Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / vera / include / verilog_tasks_err.vri
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: verilog_tasks_err.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
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// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
//
// ========== Copyright Header End ============================================
#ifdef NTB
hdl_task injDTLBerr (bit [2:0] etype,
bit [5:0] dtdp_bit,
bit diag_acc)
"tb_top.ras.dtlb_err.injDTLBerr";
hdl_task injDCerr (bit [3:0] etype,
bit [1:0] dcvp_mask,
bit [4:0] dctp_mask,
bit [3:0] dcdp_mask,
bit [7:0] dcdp_word_mask,
bit [15:0] way_mask)
"tb_top.ras.dc_err.injDCerr";
hdl_task injSTBerr (bit [5:0] sbapp_mask,
bit [5:0] w0_mask0,
bit [5:0] w0_mask1,
bit [5:0] w1_mask0,
bit [5:0] w1_mask1,
bit [1:0] priv_mask,
bit stb_ue_io)
"tb_top.ras.stb_err.injSTBerr";
hdl_task injITLBerr (bit [2:0] etype,
bit [5:0] itdp_bit,
bit diag_acc)
"tb_top.ras.ifu_err.injITLBerr";
hdl_task injICDPerr(bit [5:0] icdp_mask,
bit [3:0] icdp_word_mask)
"tb_top.ras.ifu_err.injICDPerr";
hdl_task injICerr(bit [3:0] etype,
bit [1:0] icvp_mask,
bit [4:0] ictp_mask,
bit [23:0] way_mask)
"tb_top.ras.ifu_err.injICerr";
hdl_task injIRF0err(bit [2:0] etype,
bit [6:0] p0_mask0,
bit [6:0] p0_mask1,
bit [6:0] p1_mask0,
bit [6:0] p1_mask1,
bit [6:0] p2_mask0,
bit [6:0] p2_mask1)
"tb_top.ras.irf_err.injIRF0err";
hdl_task injIRF1err(bit [2:0] etype,
bit [6:0] p0_mask0,
bit [6:0] p0_mask1,
bit [6:0] p1_mask0,
bit [6:0] p1_mask1,
bit [6:0] p2_mask0,
bit [6:0] p2_mask1)
"tb_top.ras.irf_err.injIRF1err";
hdl_task injMRA0err(reg [6:0] mask0,
reg [6:0] mask1,
reg mra_wr_err_en)
"tb_top.ras.mra_err.injMRA0err";
hdl_task injMRA1err(reg [6:0] mask0,
reg [6:0] mask1,
reg mra_wr_err_en)
"tb_top.ras.mra_err.injMRA1err";
hdl_task injSCA0err(reg [6:0] mask0,
reg [6:0] mask1)
"tb_top.ras.sca_err.injSCA0err";
hdl_task injSCA1err(reg [6:0] mask0,
reg [6:0] mask1)
"tb_top.ras.sca_err.injSCA1err";
hdl_task injTSA0err(reg [6:0] w0_mask0,
reg [6:0] w0_mask1,
reg [6:0] w1_mask0,
reg [6:0] w1_mask1,
reg [2:0] req_type,
reg tsa_wr_err_en)
"tb_top.ras.tsa_err.injTSA0err";
hdl_task injTSA1err(reg [6:0] w0_mask0,
reg [6:0] w0_mask1,
reg [6:0] w1_mask0,
reg [6:0] w1_mask1,
reg [2:0] req_type,
reg tsa_wr_err_en)
"tb_top.ras.tsa_err.injTSA1err";
hdl_task injTCCerr(reg [6:0] mask0,
reg [6:0] mask1,
reg [2:0] req_type)
"tb_top.ras.tcc_err.injTCCerr";
hdl_task injFRFerr(reg [38:0] rs1_mask0,
reg [38:0] rs1_mask1,
reg [38:0] rs2_mask0,
reg [38:0] rs2_mask1,
reg is_pdist,
reg [2:0] etype)
"tb_top.ras.frf_err.injFRFerr";
hdl_task injMAMEMerr(reg [5:0] p0_mask0,
reg [5:0] p0_mask1,
reg [5:0] p1_mask0,
reg [5:0] p1_mask1)
"tb_top.ras.mamem_err.injMAMEMerr";
#else
#ifdef PROG_FILE
#define EXTERN
#else
#define EXTERN extern
#endif
EXTERN hdl_task injDTLBerr (bit [2:0] etype,
bit [5:0] dtdp_bit,
bit diag_acc)
#ifndef PROG_FILE
;
#else
"tb_top.ras.dtlb_err.injDTLBerr";
#endif
EXTERN hdl_task injDCerr (bit [3:0] etype,
bit [1:0] dcvp_mask,
bit [4:0] dctp_mask,
bit [3:0] dcdp_mask,
bit [7:0] dcdp_word_mask,
bit [15:0] way_mask)
#ifndef PROG_FILE
;
#else
"tb_top.ras.dc_err.injDCerr";
#endif
EXTERN hdl_task injSTBerr (bit [5:0] sbapp_mask,
bit [5:0] w0_mask0,
bit [5:0] w0_mask1,
bit [5:0] w1_mask0,
bit [5:0] w1_mask1,
bit [1:0] priv_mask,
bit stb_ue_io)
#ifndef PROG_FILE
;
#else
"tb_top.ras.stb_err.injSTBerr";
#endif
EXTERN hdl_task injITLBerr (bit [2:0] etype,
bit [5:0] itdp_bit,
bit diag_acc)
#ifndef PROG_FILE
;
#else
"tb_top.ras.ifu_err.injITLBerr";
#endif
EXTERN hdl_task injICDPerr(bit [5:0] icdp_mask,
bit [3:0] icdp_word_mask)
#ifndef PROG_FILE
;
#else
"tb_top.ras.ifu_err.injICDPerr";
#endif
EXTERN hdl_task injICerr(bit [3:0] etype,
bit [1:0] icvp_mask,
bit [4:0] ictp_mask,
bit [23:0] way_mask)
#ifndef PROG_FILE
;
#else
"tb_top.ras.ifu_err.injICerr";
#endif
EXTERN hdl_task injIRF0err(bit [2:0] etype,
bit [6:0] p0_mask0,
bit [6:0] p0_mask1,
bit [6:0] p1_mask0,
bit [6:0] p1_mask1,
bit [6:0] p2_mask0,
bit [6:0] p2_mask1)
#ifndef PROG_FILE
;
#else
"tb_top.ras.irf_err.injIRF0err";
#endif
EXTERN hdl_task injIRF1err(bit [2:0] etype,
bit [6:0] p0_mask0,
bit [6:0] p0_mask1,
bit [6:0] p1_mask0,
bit [6:0] p1_mask1,
bit [6:0] p2_mask0,
bit [6:0] p2_mask1)
#ifndef PROG_FILE
;
#else
"tb_top.ras.irf_err.injIRF1err";
#endif
EXTERN hdl_task injMRA0err(reg [6:0] mask0,
reg [6:0] mask1,
reg mra_wr_err_en)
#ifndef PROG_FILE
;
#else
"tb_top.ras.mra_err.injMRA0err";
#endif
EXTERN hdl_task injMRA1err(reg [6:0] mask0,
reg [6:0] mask1,
reg mra_wr_err_en)
#ifndef PROG_FILE
;
#else
"tb_top.ras.mra_err.injMRA1err";
#endif
EXTERN hdl_task injSCA0err(reg [6:0] mask0,
reg [6:0] mask1)
#ifndef PROG_FILE
;
#else
"tb_top.ras.sca_err.injSCA0err";
#endif
EXTERN hdl_task injSCA1err(reg [6:0] mask0,
reg [6:0] mask1)
#ifndef PROG_FILE
;
#else
"tb_top.ras.sca_err.injSCA1err";
#endif
EXTERN hdl_task injTSA0err(reg [6:0] w0_mask0,
reg [6:0] w0_mask1,
reg [6:0] w1_mask0,
reg [6:0] w1_mask1,
reg [2:0] req_type,
reg tsa_wr_err_en)
#ifndef PROG_FILE
;
#else
"tb_top.ras.tsa_err.injTSA0err";
#endif
EXTERN hdl_task injTSA1err(reg [6:0] w0_mask0,
reg [6:0] w0_mask1,
reg [6:0] w1_mask0,
reg [6:0] w1_mask1,
reg [2:0] req_type,
reg tsa_wr_err_en)
#ifndef PROG_FILE
;
#else
"tb_top.ras.tsa_err.injTSA1err";
#endif
EXTERN hdl_task injTCCerr(reg [6:0] mask0,
reg [6:0] mask1,
reg [2:0] req_type)
#ifndef PROG_FILE
;
#else
"tb_top.ras.tcc_err.injTCCerr";
#endif
EXTERN hdl_task injFRFerr(reg [38:0] rs1_mask0,
reg [38:0] rs1_mask1,
reg [38:0] rs2_mask0,
reg [38:0] rs2_mask1,
reg is_pdist,
reg [2:0] etype)
#ifndef PROG_FILE
;
#else
"tb_top.ras.frf_err.injFRFerr";
#endif
EXTERN hdl_task injMAMEMerr(reg [5:0] p0_mask0,
reg [5:0] p0_mask1,
reg [5:0] p1_mask0,
reg [5:0] p1_mask1)
#ifndef PROG_FILE
;
#else
"tb_top.ras.mamem_err.injMAMEMerr";
#endif
#endif