// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: tl_top.hpp
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// it under the terms of the GNU General Public License as published by
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// ========== Copyright Header End ============================================
#include "pcie_common/tlm/tlm_data_channel.hpp"
class tl_top : public sc_module
tl_top(sc_module_name module_name, sc_event *parent_global_event, uint8 *parent_global_event_type) :
this->parent_global_event = parent_global_event;
this->parent_global_event_type = parent_global_event_type;
m_etl = new etl("etl",parent_global_event,parent_global_event_type);
m_itl = new itl("itl",parent_global_event,parent_global_event_type);
m_rsb = new rsb("rsb",parent_global_event,parent_global_event_type);
itl_rsb_data_chnl = new tlm_transport_channel<RefPciePacket,bool>;
m_rsb->ing_port(itl_rsb_data_chnl->slave_export);
m_itl->rsb_out_port(itl_rsb_data_chnl->target_export);
etl_rsb_data_chnl = new tlm_data_channel<RefPciePacket>("etl_rsb_chnl",parent_global_event,parent_global_event_type);
m_etl->eg_etl_rsb_port(*etl_rsb_data_chnl);
m_rsb->eg_port(*etl_rsb_data_chnl);
SC_HAS_PROCESS( tl_top );
csr_if_port< CSR_ADDR_T, CSR_DATA_T > csr_port;
void etl_data_port(data_out_port<RefPciePacket>::if_type& i) {
void itl_data_port(data_in_port<RefPciePacket>::if_type& i) {
csr_port.set_notify_event(PEU_CSR_A_CORE_STATUS_HW_ADDR,&core_status_ev);
core_status = csr_port.read_csr(PEU_CSR_A_CORE_STATUS_HW_ADDR);
if (core_status(48,44) == 16) {
csr_port.write_csr(PEU_CSR_A_OE_ERR_RW1S_ALIAS_HW_ADDR, 0x100);
tlm_transport_channel< RefPciePacket , bool> *itl_rsb_data_chnl;
tlm_data_channel< RefPciePacket > *etl_rsb_data_chnl;
sc_event *parent_global_event;
uint8 *parent_global_event_type;
#endif // INC_tl_top_hpp__