design/sys/iop/ccx/rtl/ccx_rep.v

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//
// OpenSPARC T2 Processor File: ccx_rep.v
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module ccx_rep (
  rep_out,
  rep_in);

output [11:0] rep_out;

input [11:0]  rep_in;

cl_dp1_rep_m6_32x i0(
                  .in (rep_in[0]),
                  .out(rep_out[0]));

cl_dp1_rep_m6_32x i1(
                  .in (rep_in[1]),
                  .out(rep_out[1]));

cl_dp1_rep_m6_32x i2(
                  .in (rep_in[2]),
                  .out(rep_out[2]));

cl_dp1_rep_m6_32x i3(
                  .in (rep_in[3]),
                  .out(rep_out[3]));

cl_dp1_rep_m6_32x i4(
                  .in (rep_in[4]),
                  .out(rep_out[4]));

cl_dp1_rep_m6_32x i5(
                  .in (rep_in[5]),
                  .out(rep_out[5]));

cl_dp1_rep_m6_32x i6(
                  .in (rep_in[6]),
                  .out(rep_out[6]));

cl_dp1_rep_m6_32x i7(
                  .in (rep_in[7]),
                  .out(rep_out[7]));

cl_dp1_rep_m6_32x i8(
                  .in (rep_in[8]),
                  .out(rep_out[8]));

cl_dp1_rep_m6_32x i9(
                  .in (rep_in[9]),
                  .out(rep_out[9]));

cl_dp1_rep_m6_32x i10(
                  .in (rep_in[10]),
                  .out(rep_out[10]));

cl_dp1_rep_m6_32x i11(
                  .in (rep_in[11]),
                  .out(rep_out[11]));


endmodule // ccx_rep