design/sys/iop/cmp/rtl/n2_rptr_m5h_18.v

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//
// OpenSPARC T2 Processor File: n2_rptr_m5h_18.v
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module n2_rptr_m5h_18 (
in,
out
);
input   [17:0] in;
output  [17:0] out;

`ifdef LIB
//assign out[17:0] = in[17:0];
buf (out[0], in[0]);
buf (out[1], in[1]);
buf (out[2], in[2]);
buf (out[3], in[3]);
buf (out[4], in[4]);
buf (out[5], in[5]);
buf (out[6], in[6]);
buf (out[7], in[7]);
buf (out[8], in[8]);
buf (out[9], in[9]);
buf (out[10], in[10]);
buf (out[11], in[11]);
buf (out[12], in[12]);
buf (out[13], in[13]);
buf (out[14], in[14]);
buf (out[15], in[15]);
buf (out[16], in[16]);
buf (out[17], in[17]);

`endif

endmodule