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// OpenSPARC T2 Processor File: dmu_cmu_rcm_schrcd_q.v
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// ========== Copyright Header End ============================================
module dmu_cmu_rcm_schrcd_q (
//************************************************
//************************************************
// Ingress Schedule Record Fields
// parameter MM2CM_WDTH = `FIRE_DLC_ISR_REC_WDTH; //79
parameter SRMSB = `FIRE_DLC_ISR_MSB; // MM2CM_WDTH -1
parameter SRTYP_WDTH = `FIRE_DLC_ISR_TYP_WDTH, // 7
SRLEN_WDTH = `FIRE_DLC_ISR_LEN_WDTH, //10
SRDWBE_WDTH = `FIRE_DLC_ISR_DWBE_WDTH, // 8
SRADDR_WDTH = `FIRE_DLC_ISR_ADDR_WDTH, //41
// SRADDERR_WDTH = `FIRE_DLC_ISR_ADDRERR_WDTH, // 1
SRDPTR_WDTH = `FIRE_DLC_ISR_DPTR_WDTH, // 7
SRSBDTAG_WDTH = `FIRE_DLC_ISR_SBDTAG_WDTH; // 5
parameter SRTYPMSB = SRTYP_WDTH -1,
SRLENMSB = SRLEN_WDTH -1,
SRDWBEMSB = SRDWBE_WDTH -1,
SRADDRMSB = SRADDR_WDTH -1,
SRDPTRMSB = SRDPTR_WDTH -1,
SRSBDTAGMSB = SRSBDTAG_WDTH -1;
SBDTAGMSB = `FIRE_DLC_ISR_SBDTAG_MSB,
DPTRLSB = `FIRE_DLC_ISR_DPTR_LSB,
DPTRMSB = `FIRE_DLC_ISR_DPTR_MSB,
// ADDRERRLSB = `FIRE_DLC_ISR_ADDRERR_LSB,
ADDRERRMSB = `FIRE_DLC_ISR_ADDRERR_MSB,
ADDRLSB = `FIRE_DLC_ISR_ADDR_LSB,
ADDRMSB = `FIRE_DLC_ISR_ADDR_MSB,
DWBELSB = `FIRE_DLC_ISR_DWBE_LSB,
DWBEMSB = `FIRE_DLC_ISR_DWBE_MSB,
LENLSB = `FIRE_DLC_ISR_LEN_LSB,
LENMSB = `FIRE_DLC_ISR_LEN_MSB,
TYPLSB = `FIRE_DLC_ISR_TYP_LSB,
TYPMSB = `FIRE_DLC_ISR_TYP_MSB;
//************************************************
//************************************************
input clk; // The input clock
input rst_l; // The fifo rst_l
input [SRMSB :0] rcd_in; // Schedule record in
input enq; // enqueue to schrcd_q
input deq; // local dequeue for packet fifo
output [SRTYPMSB : 0] typ;
output [SRLENMSB : 0] len;
output [SRDWBEMSB : 0] dwbe;
output [SRADDRMSB : 0] addr;
output [SRDPTRMSB : 0] dptr;
output [SRSBDTAGMSB : 0] sbd_tag;
output full; // schrcd_q is full
output overflow; // schrcd_q overflow
output underflow; // schrcd_q underflow
output empty; // fifo empty exported
//************************************************
//************************************************
wire typ_full, typ_empty, typ_overflow, typ_underflow;
wire len_empty, len_overflow, len_underflow;
wire dwbe_empty, dwbe_overflow, dwbe_underflow;
wire addr_empty, addr_overflow, addr_underflow;
wire dptr_empty, dptr_overflow, dptr_underflow;
wire sbdtag_empty, sbdtag_overflow, sbdtag_underflow;
wire [SRTYPMSB : 0] rcd_typ;
wire [SRLENMSB : 0] rcd_len;
wire [SRDWBEMSB : 0] rcd_dwbe;
wire [SRADDRMSB : 0] rcd_addr;
wire [SRDPTRMSB : 0] rcd_dptr;
wire [SRSBDTAGMSB : 0] rcd_sbdtag;
// Schedule Record field assignments to RCM signals
assign rcd_typ[SRTYPMSB : 0] = rcd_in[TYPMSB : TYPLSB ];
assign rcd_len[SRLENMSB : 0] = rcd_in[LENMSB : LENLSB];
assign rcd_dwbe[SRDWBEMSB : 0] = rcd_in[DWBEMSB : DWBELSB];
assign rcd_addr[SRADDRMSB : 0] = rcd_in[ADDRMSB : ADDRLSB];
assign rcd_addrerr = rcd_in[ADDRERRMSB];
assign rcd_dptr[SRDPTRMSB : 0] = rcd_in[DPTRMSB : DPTRLSB];
assign rcd_sbdtag[SRSBDTAGMSB : 0] = rcd_in[SBDTAGMSB : SBDTAGLSB];
//************************************************
//************************************************
fire_dmc_common_srfifo #(SRTYP_WDTH, DEPTH) typ_srfifo (
.underflow(typ_underflow)
fire_dmc_common_srfifo #(SRLEN_WDTH, DEPTH) len_srfifo (
.underflow(len_underflow)
fire_dmc_common_srfifo #(SRDWBE_WDTH, DEPTH) dwbe_srfifo (
.overflow(dwbe_overflow),
.underflow(dwbe_underflow)
// address and addrerr carried in addr_srfifo
fire_dmc_common_srfifo #(SRADDR_WDTH +1, DEPTH) addr_srfifo (
.data_in ({rcd_addr, rcd_addrerr}),
.data_out ({addr, addr_err}),
.overflow(addr_overflow),
.underflow(addr_underflow)
fire_dmc_common_srfifo #(SRDPTR_WDTH, DEPTH) dptr_srfifo (
.overflow(dptr_overflow),
.underflow(dptr_underflow)
fire_dmc_common_srfifo #(SRSBDTAG_WDTH, DEPTH) sbdtag_srfifo (
.overflow(sbdtag_overflow),
.underflow(sbdtag_underflow)
//assign full = (typ_full | len_full | dwbe_full |
// addr_full | dptr_full | sbdtag_full);
assign full = typ_full; // since all fifos are in lock step, single fifo full
assign overflow = (typ_overflow | len_overflow | dwbe_overflow |
addr_overflow | dptr_overflow | sbdtag_overflow);
assign underflow = (typ_underflow | len_underflow | dwbe_underflow |
addr_underflow | dptr_underflow | sbdtag_underflow);
assign empty = (typ_empty & len_empty & dwbe_empty &
addr_empty & dptr_empty & sbdtag_empty);