design/sys/iop/dmu/rtl/dmu_psb_addr_decode.v

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: dmu_psb_addr_decode.v
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module dmu_psb_addr_decode
        (
        clk,
        rst_l,
        daemon_csrbus_valid,
        daemon_csrbus_addr,
        csrbus_src_bus,
        daemon_csrbus_wr,
        daemon_csrbus_mapped,
        csrbus_acc_vio,
        daemon_transaction_in_progress,
        instance_id,
        daemon_csrbus_done,
        stage_mux_only_ext_done_0_out,
        psb_dma_select,
        psb_pio_select
        );

//====================================================================
//     Polarity declarations
//====================================================================
input  clk;  // Clock signal
input  rst_l;  // Reset
input  daemon_csrbus_valid;  // Daemon_Valid
input  [`FIRE_CSRBUS_ADDR_WIDTH - 1:0] daemon_csrbus_addr;  // Daemon_Addr
input  [1:0] csrbus_src_bus;  // Source bus
input  daemon_csrbus_wr;  // Read/Write signal
output daemon_csrbus_mapped;  // mapped
output csrbus_acc_vio;  // acc_vio
input  daemon_transaction_in_progress;  // daemon_transaction_in_progress
input  instance_id;  // Instance ID
output daemon_csrbus_done;  // Operation is done
input  stage_mux_only_ext_done_0_out;  // Operation is done
output psb_dma_select;  // select signal
output psb_pio_select;  // select signal

//====================================================================
//     Type declarations
//====================================================================
wire clk;  // Clock signal
wire rst_l;  // Reset
wire daemon_csrbus_valid;  // Daemon_Valid
wire [`FIRE_CSRBUS_ADDR_WIDTH - 1:0] daemon_csrbus_addr;  // Daemon_Addr
wire [1:0] csrbus_src_bus;  // Source bus
wire daemon_csrbus_wr;  // Read/Write signal
wire daemon_csrbus_mapped;  // mapped
wire csrbus_acc_vio;  // acc_vio
wire daemon_transaction_in_progress;  // daemon_transaction_in_progress
wire instance_id;  // Instance ID
wire daemon_csrbus_done;  // Operation is done
wire stage_mux_only_ext_done_0_out;  // Operation is done
reg psb_dma_select;  // select signal
reg psb_pio_select;  // select signal


//====================================================================
//     Clocked valid
//====================================================================
reg clocked_valid;
reg clocked_valid_pulse;
always @(posedge clk)
  begin
     if(~rst_l)
       begin
          clocked_valid <= 1'b0;
          clocked_valid_pulse <= 1'b0;
       end
     else
       begin
          clocked_valid <= daemon_csrbus_valid;
          clocked_valid_pulse <= daemon_csrbus_valid & ~clocked_valid;
       end
  end

//====================================================================
//    Address Decode
//====================================================================
reg psb_dma_addr_decoded;
reg psb_pio_addr_decoded;

always @(daemon_csrbus_addr or daemon_csrbus_valid or instance_id)
  begin
    if (~daemon_csrbus_valid)
      begin
        psb_dma_addr_decoded = 1'b0;
        psb_pio_addr_decoded = 1'b0;
      end
    else
      case (instance_id)

        `FIRE_DLC_PSB_INSTANCE_ID_VALUE_A:
          begin
        psb_dma_addr_decoded =
                {5'b0,daemon_csrbus_addr[26:5]} ==
                    `FIRE_DLC_PSB_CSR_A_PSB_DMA_HW_ADDR >>
                        `FIRE_DLC_PSB_CSR_PSB_DMA_LOW_ADDR_WIDTH;
        psb_pio_addr_decoded =
                {4'b0,daemon_csrbus_addr[26:4]} ==
                    `FIRE_DLC_PSB_CSR_A_PSB_PIO_HW_ADDR >>
                        `FIRE_DLC_PSB_CSR_PSB_PIO_LOW_ADDR_WIDTH;
          end

        `FIRE_DLC_PSB_INSTANCE_ID_VALUE_B:
          begin
        psb_dma_addr_decoded =
                {5'b0,daemon_csrbus_addr[26:5]} ==
                    `FIRE_DLC_PSB_CSR_B_PSB_DMA_HW_ADDR >>
                        `FIRE_DLC_PSB_CSR_PSB_DMA_LOW_ADDR_WIDTH;
        psb_pio_addr_decoded =
                {4'b0,daemon_csrbus_addr[26:4]} ==
                    `FIRE_DLC_PSB_CSR_B_PSB_PIO_HW_ADDR >>
                        `FIRE_DLC_PSB_CSR_PSB_PIO_LOW_ADDR_WIDTH;
          end

        default:
          begin
            psb_dma_addr_decoded = 1'b0;
            psb_pio_addr_decoded = 1'b0;
// vlint flag_system_call off
            // synopsys translate_off
            if(daemon_csrbus_valid)
               begin // axis tbcall_region
`ifdef PR_ERROR if ($time > 1 && rst_l) `PR_ERROR("dmu_psb_addr_decode",`MON_ERROR,"ERROR: Instance ID for module dmu_psb_csr is bad"); `endif
               end // end of tbcall_region
            // synopsys translate_on
// vlint flag_system_call on
          end
      endcase
  end

//====================================================================
//      Register violations
//====================================================================
//----- reg_acc_vio: psb_dma
reg psb_dma_acc_vio;
always @(csrbus_src_bus or daemon_csrbus_wr or
         psb_dma_addr_decoded or
         daemon_transaction_in_progress)
  begin
    if (daemon_transaction_in_progress | ~psb_dma_addr_decoded)
      psb_dma_acc_vio = 1'b0;
    else
      case ({csrbus_src_bus, daemon_csrbus_wr})
        // reads
          {`FIRE_CSRBUS_SRC_BUS_ENC_JTAG, 1'b0}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_SLOW, 1'b0}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_MED, 1'b0}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_FAST, 1'b0}:
              psb_dma_acc_vio = 1'b0;
        // writes
          {`FIRE_CSRBUS_SRC_BUS_ENC_JTAG, 1'b1}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_SLOW, 1'b1}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_MED, 1'b1}:
              psb_dma_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_FAST, 1'b1}:
              psb_dma_acc_vio = 1'b0;

          default:
             begin
                psb_dma_acc_vio = 1'b0;
                begin // axis tbcall_region
                      // vlint flag_system_call off
                      // synopsys translate_off
`ifdef PR_ERROR if ($time > 1 && rst_l) `PR_ERROR("dmu_psb_addr_decode",`MON_ERROR,"acc_vio: default case of dmu_psb_csr_a_psb_dma"); `endif
                    // synopsys translate_on
                    // vlint flag_system_call on
                end // end of tbcall_region
             end
      endcase
  end
//----- reg_acc_vio: psb_pio
reg psb_pio_acc_vio;
always @(csrbus_src_bus or daemon_csrbus_wr or
         psb_pio_addr_decoded or
         daemon_transaction_in_progress)
  begin
    if (daemon_transaction_in_progress | ~psb_pio_addr_decoded)
      psb_pio_acc_vio = 1'b0;
    else
      case ({csrbus_src_bus, daemon_csrbus_wr})
        // reads
          {`FIRE_CSRBUS_SRC_BUS_ENC_JTAG, 1'b0}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_SLOW, 1'b0}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_MED, 1'b0}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_FAST, 1'b0}:
              psb_pio_acc_vio = 1'b0;
        // writes
          {`FIRE_CSRBUS_SRC_BUS_ENC_JTAG, 1'b1}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_SLOW, 1'b1}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_MED, 1'b1}:
              psb_pio_acc_vio = 1'b0;
          {`FIRE_CSRBUS_SRC_BUS_ENC_PIO_FAST, 1'b1}:
              psb_pio_acc_vio = 1'b0;

          default:
             begin
                psb_pio_acc_vio = 1'b0;
                begin // axis tbcall_region
                      // vlint flag_system_call off
                      // synopsys translate_off
`ifdef PR_ERROR if ($time > 1 && rst_l) `PR_ERROR("dmu_psb_addr_decode",`MON_ERROR,"acc_vio: default case of dmu_psb_csr_a_psb_pio"); `endif
                    // synopsys translate_on
                    // vlint flag_system_call on
                end // end of tbcall_region
             end
      endcase
  end

//====================================================================
//    Status: daemon_csrbus_mapped / csrbus_acc_vio
//====================================================================
//----- OUTPUT: daemon_csrbus_mapped
assign daemon_csrbus_mapped = clocked_valid_pulse &
                                (
                                  psb_dma_addr_decoded |
                                  psb_pio_addr_decoded
                                );


//----- OUTPUT: csrbus_acc_vio
assign csrbus_acc_vio = clocked_valid_pulse &
                        psb_dma_acc_vio |
                        psb_pio_acc_vio;

//====================================================================
//    Select
//====================================================================
always @(posedge clk)
  begin
     if(~rst_l)
       begin
          psb_dma_select <= 1'b0;
          psb_pio_select <= 1'b0;
       end
     else
       begin
          psb_dma_select <=
         ~ psb_dma_acc_vio &
         psb_dma_addr_decoded;

          psb_pio_select <=
         ~ psb_pio_acc_vio &
         psb_pio_addr_decoded;

        end
  end

//====================================================================
//    Cycle Counter: Used for ExtReadTiming / ExtWriteTiming
//====================================================================

//====================================================================
//   OUTPUT: daemon_csrbus_done (pipelining)
//====================================================================
//----- DONE for internal/extern registers
reg stage_1_daemon_csrbus_done_internal_0;
reg stage_2_daemon_csrbus_done_internal_0;

always @(posedge clk)
  begin
     if(~rst_l)
       begin
         stage_1_daemon_csrbus_done_internal_0 <= 1'b0;
       end
     else
       begin
         stage_1_daemon_csrbus_done_internal_0 <=
                 psb_dma_select & clocked_valid_pulse & daemon_csrbus_wr |
                 psb_pio_select & clocked_valid_pulse & daemon_csrbus_wr;
       end
     if(~rst_l)
       begin
         stage_2_daemon_csrbus_done_internal_0 <= 1'b0;
       end
     else
       begin
         stage_2_daemon_csrbus_done_internal_0 <=
                 stage_1_daemon_csrbus_done_internal_0;
       end
  end

//----- OUTPUT: daemon_csrbus_done
assign daemon_csrbus_done = daemon_csrbus_valid &
          (
            stage_2_daemon_csrbus_done_internal_0 |
            stage_mux_only_ext_done_0_out
          );


endmodule // dmu_psb_addr_decode