Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_zcp_fflp_intf.v
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// OpenSPARC T2 Processor File: niu_zcp_fflp_intf.v
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/*%W% %G%*/
/***************************************************************
*
* File Name : niu_zcp_fflp_intf.v
* Author Name : John Lo
* Description : niu_zcp_fflp_intf
* Parent Module:
* Child Module:
* Interface Mod:
* Date Created : 3/18/05
*
* Copyright (c) 2020, Sun Microsystems, Inc.
* Sun Proprietary and Confidential
*
* Modification :
*
* Synthesis Notes:
*
* Design Notes: When adding more CAL states DON'T forget to
* modify tt_atomic_op.
*
*
**************************************************************/
module niu_zcp_fflp_intf
(/*AUTOARG*/
// Outputs
ififo_ren, ififo_dout, ififo_overrun, ififo_state,
// Inputs
clk, fflp_reset, fflp_zcp_wr, fflp_zcp_data
);
input clk;
input [5:0] fflp_reset;
input [4:0] fflp_zcp_wr;
input [`IFIFO_W_R] fflp_zcp_data;// 27 bytes = 216 bits
// outputs
output [2:0] ififo_ren;
output [`IFIFO_W_R] ififo_dout;
output ififo_overrun;
output [2:0] ififo_state;
wire [2:0] ififo_ren;
wire [5:0] reset = fflp_reset;
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
wire empty; // From niu_zcp_fflp_ififo of niu_zcp_ififo.v
wire ififo_ren1; // From niu_zcp_ififo_sm of niu_zcp_ififo_sm.v
// End of automatics
niu_zcp_ififo niu_zcp_fflp_ififo
(/*AUTOINST*/
// Outputs
.ififo_dout (ififo_dout[`IFIFO_W_R]),
.empty (empty),
.ififo_overrun (ififo_overrun),
// Inputs
.clk (clk),
.reset (reset[4:0]),
.ififo_ren1 (ififo_ren1),
.fflp_zcp_wr (fflp_zcp_wr[4:0]),
.fflp_zcp_data (fflp_zcp_data[`IFIFO_W_R]));
niu_zcp_ififo_sm niu_zcp_ififo_sm
(/*AUTOINST*/
// Outputs
.ififo_ren1 (ififo_ren1),
.ififo_ren (ififo_ren[2:0]),
.ififo_state (ififo_state[2:0]),
// Inputs
.clk (clk),
.reset (reset[5]),
.empty (empty));
endmodule // niu_zcp_fflp_intf