design/sys/iop/pcie_common/rtl/pcie_common_dcs.v

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: pcie_common_dcs.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// it under the terms of the GNU General Public License as published by
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// GNU General Public License for more details.
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module pcie_common_dcs
  (
   clk,                         // source clock
   rst_l,                       // reset
   csr_rng_data,                // ring data
   csr_pkt_ack,                 // packet acknowledge
   csr_pkt_data,                // packet data
   csr_pkt_req                  // packet request
   );

// ----------------------------------------------------------------------------
// Parameters
// ----------------------------------------------------------------------------
  parameter     QD = 3,                         // queue depth
                QW = `FIRE_CSR_RING_WDTH;       // queue width

// ----------------------------------------------------------------------------
// Ports
// ----------------------------------------------------------------------------
  input                                 clk;
  input                                 rst_l;
  input  [`FIRE_CSR_RING_BITS]          csr_rng_data;
  input                                 csr_pkt_ack;

  output [`FIRE_CSR_PCKT_BITS]          csr_pkt_data;
  output                                csr_pkt_req;

// ----------------------------------------------------------------------------
// Variables
// ----------------------------------------------------------------------------
  wire [`FIRE_CSR_PCKT_BITS]            csr_pkt_data;
  wire                                  csr_pkt_req;
  wire                                  ism2osm_vld;
  wire [QD-2:0]                         ism2sdp_ds;
  wire [QD-1:0]                         ism2sdp_ld;
  wire                                  osm2ism_deq;
  wire [2:0]                            osm2sdp_ld;

// ----------------------------------------------------------------------------
// Zero In Checkers
// ----------------------------------------------------------------------------

// ----------------------------------------------------------------------------
// Instantiations
// ----------------------------------------------------------------------------
  pcie_common_dcs_ism #(QD) ism
    (
     .clk               (clk),
     .rst_l             (rst_l),
     .csr_rng_cmd       (csr_rng_data[`FIRE_CSR_RING_CMND_BITS]),
     .osm2ism_deq       (osm2ism_deq),
     .ism2osm_vld       (ism2osm_vld),
     .ism2sdp_ds        (ism2sdp_ds),
     .ism2sdp_ld        (ism2sdp_ld)
     );

  pcie_common_dcs_osm osm
    (
     .clk               (clk),
     .rst_l             (rst_l),
     .csr_pkt_ack       (csr_pkt_ack),
     .ism2osm_vld       (ism2osm_vld),
     .csr_pkt_req       (csr_pkt_req),
     .osm2ism_deq       (osm2ism_deq),
     .osm2sdp_ld        (osm2sdp_ld)
     );

  pcie_common_dcs_sdp #(QD, QW) sdp
    (
     .clk               (clk),
     .rst_l             (rst_l),
     .csr_rng_data      (csr_rng_data),
     .ism2sdp_ld        (ism2sdp_ld),
     .ism2sdp_ds        (ism2sdp_ds),
     .osm2sdp_ld        (osm2sdp_ld),
     .csr_pkt_data      (csr_pkt_data)
     );

endmodule // pcie_common_dcs