// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: pku_pck_ctl.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// ========== Copyright Header End ============================================
input lsu_pku_pmen; // power management enable for pku
input [3:0] pku_pick_p; // from datapath logic
input [3:0] swl_ready_p; // thread is in ready state
input [3:0] swl_spec_ready_p; // thread is in speculative ready state
input [3:0] ifu_buf0_valid_p; // oldest instruction for thread i is valid
input tcu_pce_ov; // scan signals
output [3:0] pku_raw_pick_p; // raw pick signals to mux the pc addresses in the ifu (no swl_cancel_pick or decode cancel)
assign pce_ov = tcu_pce_ov;
assign pick_en = (|nsready[3:0]) | (|sready[3:0]) | ~lsu_pku_pmen;
pku_pck_ctl_l1clkhdr_ctl_macro clkgen (
pku_pck_ctl_spare_ctl_macro__num_1 spares (
.scan_out(spares_scanout),
assign nsready[3:0] = (swl_ready_p[3:0] & ifu_buf0_valid_p[3:0]);
assign nspick_sel = |nsready[3:0];
// 0in value -var nspick[3:0] -val 4'b0000 4'b0001 4'b0010 4'b0100 4'b1000
// 0in value -var spick[3:0] -val 4'b0000 4'b0001 4'b0010 4'b0100 4'b1000
// 0in value -var ipick[3:0] -val 4'b0000 4'b0001 4'b0010 4'b0100 4'b1000
assign nspick[3] = (nsready[3]&!nsready[1]&!nsready[0]&lru[1]&!lru[0]) | (nsready[3]
&!nsready[2]&!nsready[0]&!lru[1]&lru[0]) | (nsready[3]&!nsready[1]&!lru[2]
&!lru[0]) | (nsready[3]&!nsready[2]&!lru[3]&!lru[1]) | (nsready[3]&!nsready[2]
&!nsready[1]&!lru[1]&!lru[0]) | (nsready[3]&!nsready[0]&!lru[7]&!lru[6]
&lru[5]&lru[4]) | (nsready[3]&lru[7]&lru[6]) | (nsready[3]&!nsready[2]
&!nsready[1]&!nsready[0]);
assign nspick[2] = (!nsready[3]&nsready[2]&!nsready[1]&!lru[1]&!lru[0]) | (nsready[2]
&!nsready[1]&!nsready[0]&lru[1]&lru[0]) | (nsready[2]&!nsready[0]&lru[2]
&lru[0]) | (!nsready[3]&nsready[2]&!lru[3]&!lru[1]) | (!nsready[3]&nsready[2]
&!nsready[0]&!lru[1]&lru[0]) | (nsready[2]&!nsready[1]&!lru[7]&lru[6]
&lru[5]&!lru[4]) | (nsready[2]&lru[7]&!lru[6]) | (!nsready[3]&nsready[2]
&!nsready[1]&!nsready[0]);
assign nspick[1] = (!nsready[3]&!nsready[2]&nsready[1]&!lru[1]&!lru[0]) | (!nsready[2]
&nsready[1]&!nsready[0]&lru[1]&lru[0]) | (!nsready[3]&nsready[1]&!lru[2]
&!lru[0]) | (nsready[1]&!nsready[0]&lru[3]&lru[1]) | (!nsready[3]&nsready[1]
&!nsready[0]&lru[1]&!lru[0]) | (!nsready[2]&nsready[1]&lru[7]&!lru[6]
&!lru[5]&lru[4]) | (nsready[1]&!lru[7]&lru[6]) | (!nsready[3]&!nsready[2]
&nsready[1]&!nsready[0]);
assign nspick[0] = (!nsready[3]&!nsready[1]&nsready[0]&lru[1]&!lru[0]) | (!nsready[3]
&!nsready[2]&nsready[0]&!lru[1]&lru[0]) | (!nsready[2]&nsready[0]&lru[2]
&lru[0]) | (!nsready[1]&nsready[0]&lru[3]&lru[1]) | (!nsready[2]&!nsready[1]
&nsready[0]&lru[1]&lru[0]) | (!nsready[3]&nsready[0]&lru[7]&lru[6]&!lru[5]
&!lru[4]) | (nsready[0]&!lru[7]&!lru[6]) | (!nsready[3]&!nsready[2]
&!nsready[1]&nsready[0]);
assign sready[3:0] = (swl_spec_ready_p[3:0] & ifu_buf0_valid_p[3:0]);
assign spick[3] = (sready[3]&!sready[1]&!sready[0]&lru[1]&!lru[0]) | (sready[3]
&!sready[2]&!sready[0]&!lru[1]&lru[0]) | (sready[3]&!sready[1]&!lru[2]
&!lru[0]) | (sready[3]&!sready[2]&!lru[3]&!lru[1]) | (sready[3]&!sready[2]
&!sready[1]&!lru[1]&!lru[0]) | (sready[3]&!sready[0]&!lru[7]&!lru[6]
&lru[5]&lru[4]) | (sready[3]&lru[7]&lru[6]) | (sready[3]&!sready[2]
assign spick[2] = (!sready[3]&sready[2]&!sready[1]&!lru[1]&!lru[0]) | (sready[2]
&!sready[1]&!sready[0]&lru[1]&lru[0]) | (sready[2]&!sready[0]&lru[2]
&lru[0]) | (!sready[3]&sready[2]&!lru[3]&!lru[1]) | (!sready[3]&sready[2]
&!sready[0]&!lru[1]&lru[0]) | (sready[2]&!sready[1]&!lru[7]&lru[6]
&lru[5]&!lru[4]) | (sready[2]&lru[7]&!lru[6]) | (!sready[3]&sready[2]
assign spick[1] = (!sready[3]&!sready[2]&sready[1]&!lru[1]&!lru[0]) | (!sready[2]
&sready[1]&!sready[0]&lru[1]&lru[0]) | (!sready[3]&sready[1]&!lru[2]
&!lru[0]) | (sready[1]&!sready[0]&lru[3]&lru[1]) | (!sready[3]&sready[1]
&!sready[0]&lru[1]&!lru[0]) | (!sready[2]&sready[1]&lru[7]&!lru[6]
&!lru[5]&lru[4]) | (sready[1]&!lru[7]&lru[6]) | (!sready[3]&!sready[2]
assign spick[0] = (!sready[3]&!sready[1]&sready[0]&lru[1]&!lru[0]) | (!sready[3]
&!sready[2]&sready[0]&!lru[1]&lru[0]) | (!sready[2]&sready[0]&lru[2]
&lru[0]) | (!sready[1]&sready[0]&lru[3]&lru[1]) | (!sready[2]&!sready[1]
&sready[0]&lru[1]&lru[0]) | (!sready[3]&sready[0]&lru[7]&lru[6]&!lru[5]
&!lru[4]) | (sready[0]&!lru[7]&!lru[6]) | (!sready[3]&!sready[2]
assign ipick[3:0] = ({4{nspick_sel}} & nspick[3:0]) |
({4{~nspick_sel}} & spick[3:0]);
assign pku_raw_pick_p[3:0] = ipick[3:0];
// lru is msb pair of the lru vector
assign nlru[7] = (ipick[0]&!lru[6]&lru[5]) | (ipick[1]&lru[6]&lru[5]) | (!lru[3]
&!lru[1]) | (!ipick[2]&lru[7]&!lru[6]) | (!ipick[3]&lru[7]&lru[6]);
assign nlru[6] = (ipick[0]&!lru[7]&lru[4]) | (ipick[2]&lru[7]&lru[4]) | (!lru[2]
&!lru[0]) | (!ipick[1]&!lru[7]&lru[6]) | (!ipick[3]&lru[7]&lru[6]);
assign nlru[5] = (!ipick[3]&!ipick[0]&lru[5]&lru[4]&lru[2]&lru[1]) | (ipick[0]
&!lru[1]&lru[0]) | (ipick[1]&lru[3]&lru[1]) | (ipick[3]&lru[3]&!lru[2]
&!lru[1]) | (ipick[0]&!lru[7]&lru[3]) | (ipick[2]&lru[3]&lru[2]&!lru[1]) | (
ipick[1]&lru[3]&!lru[0]) | (!ipick[2]&!ipick[0]&!lru[7]&lru[5]&!lru[4]
&lru[2]) | (!ipick[3]&!ipick[1]&!lru[7]&lru[5]&lru[4]&!lru[2]) | (
!ipick[2]&!ipick[1]&!lru[7]&lru[5]&!lru[2]&lru[0]) | (!ipick[3]&!ipick[2]
assign nlru[4] = (ipick[0]&lru[1]&!lru[0]) | (ipick[2]&lru[2]&lru[0]) | (!ipick[3]
&!ipick[2]&lru[4]&!lru[3]&!lru[1]) | (ipick[3]&!lru[3]&lru[2]&!lru[0]) | (
ipick[0]&!lru[6]&lru[2]) | (ipick[1]&lru[3]&lru[2]&!lru[0]) | (ipick[2]
&lru[2]&!lru[1]) | (!ipick[3]&!ipick[0]&!lru[7]&!lru[6]&lru[5]&lru[4]) | (
!ipick[1]&!ipick[0]&!lru[6]&!lru[5]&lru[4]&lru[3]) | (!ipick[2]&!ipick[1]
&!lru[6]&lru[4]&!lru[3]&lru[1]) | (!ipick[3]&!ipick[1]&lru[4]&!lru[0]);
assign nlru[3] = (ipick[3]&lru[1]&!lru[0]) | (ipick[2]&lru[1]&lru[0]) | (!ipick[3]
&!ipick[2]&!ipick[1]&lru[3]&!lru[0]) | (!ipick[3]&!ipick[2]&!ipick[0]
&lru[3]&lru[0]) | (ipick[1]&lru[1]) | (ipick[0]&lru[1]) | (lru[3]
assign nlru[2] = (ipick[3]&!lru[1]&lru[0]) | (ipick[1]&lru[1]&lru[0]) | (lru[2]
&lru[0]) | (!ipick[3]&!ipick[2]&!ipick[1]&lru[2]&!lru[1]) | (!ipick[3]
&!ipick[1]&!ipick[0]&lru[2]&lru[1]) | (ipick[2]&lru[0]) | (ipick[0]
assign nlru[1] = (!ipick[1]&!ipick[0]&lru[1]) | (ipick[3]) | (ipick[2]);
assign nlru[0] = (!ipick[2]&!ipick[0]&lru[0]) | (ipick[3]) | (ipick[1]);
// only update the lru with the actual pick signals
assign any_pick = |pku_pick_p[3:0];
assign real_nlru_in[7:0] = ({8{any_pick}} & {nlru[7],nlru[6],nlru[5],~nlru[4],~nlru[3],nlru[2],~nlru[1],~nlru[0]}) |
({8{!any_pick}} & lru_out[7:0]);
pku_pck_ctl_msff_ctl_macro__width_8 lruf (
.din (real_nlru_in[7:0]),
assign lru[7:0] = {lru_out[7],lru_out[6],lru_out[5],~lru_out[4],~lru_out[3],lru_out[2],~lru_out[1],~lru_out[0]};
assign spares_scanin = scan_in ;
assign lruf_scanin = spares_scanout ;
assign scan_out = lruf_scanout ;
// any PARAMS parms go into naming of macro
module pku_pck_ctl_l1clkhdr_ctl_macro (
// Description: Spare gate macro for control blocks
// Param num controls the number of times the macro is added
// flops=0 can be used to use only combination spare logic
module pku_pck_ctl_spare_ctl_macro__num_1 (
wire spare0_buf_32x_unused;
wire spare0_nand3_8x_unused;
wire spare0_inv_8x_unused;
wire spare0_aoi22_4x_unused;
wire spare0_buf_8x_unused;
wire spare0_oai22_4x_unused;
wire spare0_inv_16x_unused;
wire spare0_nand2_16x_unused;
wire spare0_nor3_4x_unused;
wire spare0_nand2_8x_unused;
wire spare0_buf_16x_unused;
wire spare0_nor2_16x_unused;
wire spare0_inv_32x_unused;
cl_sc1_msff_8x spare0_flop (.l1clk(l1clk),
cl_u1_buf_32x spare0_buf_32x (.in(1'b1),
.out(spare0_buf_32x_unused));
cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1),
.out(spare0_nand3_8x_unused));
cl_u1_inv_8x spare0_inv_8x (.in(1'b1),
.out(spare0_inv_8x_unused));
cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1),
.out(spare0_aoi22_4x_unused));
cl_u1_buf_8x spare0_buf_8x (.in(1'b1),
.out(spare0_buf_8x_unused));
cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1),
.out(spare0_oai22_4x_unused));
cl_u1_inv_16x spare0_inv_16x (.in(1'b1),
.out(spare0_inv_16x_unused));
cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1),
.out(spare0_nand2_16x_unused));
cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0),
.out(spare0_nor3_4x_unused));
cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1),
.out(spare0_nand2_8x_unused));
cl_u1_buf_16x spare0_buf_16x (.in(1'b1),
.out(spare0_buf_16x_unused));
cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0),
.out(spare0_nor2_16x_unused));
cl_u1_inv_32x spare0_inv_32x (.in(1'b1),
.out(spare0_inv_32x_unused));
// any PARAMS parms go into naming of macro
module pku_pck_ctl_msff_ctl_macro__width_8 (
assign fdin[7:0] = din[7:0];