libs/clk/n2_clk_clkchp_4sel_32x_cust_l/n2_clk_clkchp_4sel_32x_cust/rtl/n2_clk_clkchp_4sel_32x_cust.v

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: n2_clk_clkchp_4sel_32x_cust.v
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
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// GNU General Public License for more details.
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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module n2_clk_clkchp_4sel_32x_cust (tck, aclk, bclk, s500, s1000, s1500, s2000);
input tck, s500, s1000, s1500, s2000;
output aclk, bclk;

// synopsys translate_off

reg aclk, bclk;

initial
        begin
        aclk=1'b0;
        bclk=1'b0;
        end
always@(posedge tck)
        begin
        bclk=1'b0;
        #1 if(tck==1) aclk=1'b1;
        #1 if(s500==1) aclk=1'b0;
        #1 if(s1000==1) aclk=1'b0;
        #1 if(s1500==1) aclk=1'b0;
        #1  if(s2000==1) aclk=1'b0;
        end
always@(negedge tck)
        begin
        #1 if(tck==0 && aclk==0)   bclk=1'b1;
        #1 if(s500==1)   bclk=1'b0;
        #1 if(s1000==1) bclk=1'b0;
        #1 if(s1500==1) bclk=1'b0;
        #1 if(s2000==1) bclk=1'b0;
        end

// synopsys translate_on

endmodule