tools/fpga/fpga_synth_synplicity_mapper.sdc

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# OpenSPARC T2 Processor File: fpga_synth_synplicity_mapper.sdc
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define_global_attribute  {syn_srlstyle} {registers}
define_clock   {clk} -name {clk}  -freq 16 -clockgroup clka1
define_clock   {clk48Mhz_in} -name {clk48Mhz_in}  -freq 48 -clockgroup clka2
define_clock   {n:t2.ccx.l2clk} -name {ccx_l2clk}  -freq 16 -clockgroup default_clkgroup_0
define_clock   {n:t2.spc.l2clk} -name {spc_l2clk}  -freq 16 -clockgroup default_clkgroup_1