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.IX Title "CodeGen::Gui 3"
.TH CodeGen::Gui 3 "2003-05-09" "perl v5.8.0" "User Contributed Perl Documentation"
\&\fBVerilog::Codegen::Gui\fR \- Verilog code generator GUI
\& $ ./gui.pl [design name]
The \s-1GUI\s0 and its utility scrips are in the \f(CW\*(C`scripts\*(C'\fR folder of the distribution.
The design name is optional. If no design name is provided, the \s-1GUI\s0 will check the .vcgrc file for one. If this file does not exists, the design library module defaults to DeviceLibs/Verilog.pm and the objects will reside directly under DeviceLibs/Objects. Otherwise, the design library module will be DeviceLibs/YourDesign.pm and the objects will reside under DeviceLibs/YourDesign/Objects. You can also set the design name via the \s-1GUI\s0.
The \s-1GUI\s0 is very simple to use. A short manual:
To create, test and run Verilog code using the Verilog::CodeGen \s-1GUI:\s0
.Sh "0. Choose your design."
.IX Subsection "0. Choose your design."
In the \fBDesign\fR text entry field, type the full name of the design. Click \fBSet\fR.
If the design does not exist, it will be created, that is, an empty structure with skeleton files will be created. Otherwise, the design will be set to the entered value.
.Sh "1. Create or edit the Device Object."
.IX Subsection "1. Create or edit the Device Object."
This is the Perl script that will generate the Verilog code.
In the \fBDevice Object Code\fR area text entry field, type the full name of the script, \fIincluding\fR the \f(CW\*(C`.pl\*(C'\fR extension. Click \fBEdit\fR (hitting return does not work). The \s-1GUI\s0 will create a skeleton from a template, and open it in XEmacs.
If the file already exists:
\&\-If this was the last file to be modified previously, just click \fBEdit\fR. The \s-1GUI\s0 will open the file in XEmacs.
\&\-If not, type the beginning of the file in the \fBDevice Object Code\fR text entry field, then click \fBEdit\fR. The \s-1GUI\s0 will open the first file matching the pattern in XEmacs.
.Sh "2. Test the object code"
.IX Subsection "2. Test the object code"
In the \fBDevice Object Code\fR area, click \fBParse\fR. This executes the script and displays the output in the \fBOutput log\fR window. Ticking the \fBShow result\fR tick box will cause the output to be displayed in an XEmacs window. To close this window, click \fBDone\fR. This is a modal window, in other words it will freeze the main display as long as it stays open.
.Sh "3. Add the Device Object to the Device Library"
.IX Subsection "3. Add the Device Object to the Device Library"
When the object code is bug finished, click \fBUpdate\fR in the \fBDevice Library Module\fR area. This will add the device object to the device library (which is a Perl module). Ticking the \fBShow module\fR tick box will cause the complete library module to be displayed in an XEmacs window. To close this window, click \fBDone\fR. This is a modal window, in other words it will freeze the main display as long as it stays open.
.Sh "4. Create or edit the test bench code"
.IX Subsection "4. Create or edit the test bench code"
This is the Perl script that will generate the Verilog testbench code.
In the \fBTestbench Code\fR area text entry field, type the full name of the script, \fIincluding\fR the \f(CW\*(C`.pl\*(C'\fR extension, click \fBEdit\fR. The \s-1GUI\s0 will create a skeleton from a template, and open it in XEmacs.
If the file already exists:
\&\-If this was the last file to be modified previously, just click \fBEdit\fR. The \s-1GUI\s0 will open the file in XEmacs.
\&\-If not, type the beginning of the file in the \fBDevice Object Code\fR text entry field. The testbench \fImust\fR have the name \f(CW\*(C`test_\*(C'\fR\fI[device obect file name]\fR. Then click \fBEdit\fR. The \s-1GUI\s0 will open the first file matching the pattern in XEmacs.
\&\-If the \fBOverwrite\fR tick box is ticked, the existing script will be overwritten with the skeleton. This is usefull in case of major changes to the device object code.
.Sh "5. Test the testbench code"
.IX Subsection "5. Test the testbench code"
In the \fBTestbench Code\fR area, click \fBParse\fR. This executes the script and displays the output in the \fBOutput log\fR window.
\&\-Ticking the \fBShow result\fR tick box will cause the output to be displayed in an XEmacs window. To close this window, click \fBDone\fR. This is a modal window, in other words it will freeze the main display as long as it stays open.
\&\-Ticking the \fBInspect code\fR tick box will open a browser window with pages generated by the \fBv2html\fR Verilog to \s-1HTML\s0 convertor.
\&\-Ticking the \fBRun\fR tick box will execute the generated testbench.
\&\-Ticking the \fBPlot\fR tick box will plot the simulation results (if any exist).
.IX Header "REQUIREMENTS"
\&\fBPerl-Tk\fR (<http://search.cpan.org/CPAN/authors/id/N/NI/NI\-S/Tk\-800.024.tar.gz>)
\&\fBXEmacs\fR (<http://xemacs.org>)
With \fBgnuserv\fR enabled, i.e. put the line (gnuserv\-start) in your .emacs. Without XEmacs, the \s-1GUI\s0 is rather useless.
For a better user experience, customize gnuserv to open files in the active frame. By default, gnuserv will open a new frame for every new file, and you end up with lots of frames.
\& o Choose Options->Customize->Group
\& o Open the "Gnuserv Frame" section (by clicking on the arrow)
\& o Tick "Use selected frame"
I also use the \fBauto-revert-mode\fR <ftp://ftp.csd.uu.se/pub/users/andersl/emacs/autorevert.el> because parsing the test bench code modifies it, and I got annoyed by XEmacs prompting me for confirmation. See the file for details on how to install.
The \fBVerilog-mode\fR (<http://www.verilog.com/>)is (obviously) very usefull too.
\&\fBv2html\fR (<http://www.burbleland.com/v2html/v2html.html>)
If you want to inspect the generated code, you need the v2html Verilog to \s-1HTML\s0 convertor and a controllable browser, I use galeon (<http://galeon.sourceforge.net>).
\&\fBA Verilog compiler/simulator\fR
To run the testbench, I use Icarus Verilog <http://icarus.com/eda/verilog/index.html>, a great open source Verilog simulator.
\&\fBA \s-1VCD\s0 waveform viewer\fR
To plot the results, I use GTkWave (<http://www.cs.man.ac.uk/apt/tools/gtkwave/index.html>, a great open source waveform viewer.
.Sh "To use a different Verilog compiler/simulator and/or \s-1VCD\s0 viewer:"
.IX Subsection "To use a different Verilog compiler/simulator and/or VCD viewer:"
In CodeGen.pm, change the following lines:
\& #Modify this to use different compiler/simulator/viewer
\& my $compiler="/usr/bin/iverilog";
\& my $simulator="/usr/bin/vvp";
\& my $vcdviewer="/usr/local/bin/gtkwave";
Convert the utility scripts to functions to be called from Verilog::CodeGen.
Put the \s-1GUI\s0 scripts in a module Gui.pm.
W. Vanderbauwhede \fBwim@motherearth.org\fR.
<http://www.comms.eee.strath.ac.uk/~wim>
Copyright (c) 2002,2003 Wim Vanderbauwhede. All rights reserved. This program is free software; you can redistribute it and/or modify it under the same terms as Perl itself.
projects / OpenSPARC-T2-DV / blob