* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: n2_pm_all_dimm_rdwr_6.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
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* CA 95054 USA or visit www.sun.com if you need additional information or
* ========== Copyright Header End ============================================
#define MAIN_PAGE_NUCLEUS_ALSO
#define MAIN_PAGE_HV_ALSO
#define L20_MCU_DM0_BK0 0x0000134000
#define L20_MCU_DM0_BK2 0x0000134200
#define L20_MCU_DM0_BK4 0x0000134400
#define L20_MCU_DM0_BK6 0x0000134600
#define L20_MCU_DM1_BK0 0x0800134000
#define L20_MCU_DM1_BK2 0x0800134200
#define L20_MCU_DM1_BK4 0x0800134400
#define L20_MCU_DM1_BK6 0x0800134600
#define L20_MCU_DM2_BK0 0x1000134000
#define L20_MCU_DM2_BK2 0x1000134200
#define L20_MCU_DM2_BK4 0x1000134400
#define L20_MCU_DM2_BK6 0x1000134600
#define L20_MCU_DM3_BK0 0x1800134000
#define L20_MCU_DM3_BK2 0x1800134200
#define L20_MCU_DM3_BK4 0x1800134400
#define L20_MCU_DM3_BK6 0x1800134600
#define L20_MCU_DM4_BK0 0x2000134000
#define L20_MCU_DM4_BK2 0x2000134200
#define L20_MCU_DM4_BK4 0x2000134400
#define L20_MCU_DM4_BK6 0x2000134600
#define L20_MCU_DM5_BK0 0x2800134000
#define L20_MCU_DM5_BK2 0x2800134200
#define L20_MCU_DM5_BK4 0x2800134400
#define L20_MCU_DM5_BK6 0x2800134600
#define L20_MCU_DM6_BK0 0x3000134000
#define L20_MCU_DM6_BK2 0x3000134200
#define L20_MCU_DM6_BK4 0x3000134400
#define L20_MCU_DM6_BK6 0x3000134600
#define L20_MCU_DM7_BK0 0x3800134000
#define L20_MCU_DM7_BK2 0x3800134200
#define L20_MCU_DM7_BK4 0x3800134400
#define L20_MCU_DM7_BK6 0x3800134600
#define L2_1_MCU_DM0_BK1 0x0000134040
#define L2_1_MCU_DM0_BK3 0x0000134240
#define L2_1_MCU_DM0_BK5 0x0000134440
#define L2_1_MCU_DM0_BK7 0x0000134640
#define L2_1_MCU_DM1_BK1 0x0800134040
#define L2_1_MCU_DM1_BK3 0x0800134240
#define L2_1_MCU_DM1_BK5 0x0800134440
#define L2_1_MCU_DM1_BK7 0x0800134640
#define L2_1_MCU_DM2_BK1 0x1000134040
#define L2_1_MCU_DM2_BK3 0x1000134240
#define L2_1_MCU_DM2_BK5 0x1000134440
#define L2_1_MCU_DM2_BK7 0x1000134640
#define L2_1_MCU_DM3_BK1 0x1800134040
#define L2_1_MCU_DM3_BK3 0x1800134240
#define L2_1_MCU_DM3_BK5 0x1800134440
#define L2_1_MCU_DM3_BK7 0x1800134640
#define L2_1_MCU_DM4_BK1 0x2000134040
#define L2_1_MCU_DM4_BK3 0x2000134240
#define L2_1_MCU_DM4_BK5 0x2000134440
#define L2_1_MCU_DM4_BK7 0x2000134640
#define L2_1_MCU_DM5_BK1 0x2800134040
#define L2_1_MCU_DM5_BK3 0x2800134240
#define L2_1_MCU_DM5_BK5 0x2800134440
#define L2_1_MCU_DM5_BK7 0x2800134640
#define L2_1_MCU_DM6_BK1 0x3000134040
#define L2_1_MCU_DM6_BK3 0x3000134240
#define L2_1_MCU_DM6_BK5 0x3000134440
#define L2_1_MCU_DM6_BK7 0x3000134640
#define L2_1_MCU_DM7_BK1 0x3800134040
#define L2_1_MCU_DM7_BK3 0x3800134240
#define L2_1_MCU_DM7_BK5 0x3800134440
#define L2_1_MCU_DM7_BK7 0x3800134640
#define L20_MCU_DM0_BK0 0x0000134000
#define L20_MCU_DM0_BK2 0x0000134100
#define L20_MCU_DM0_BK4 0x0000134200
#define L20_MCU_DM0_BK6 0x0000134300
#define L20_MCU_DM1_BK0 0x0400134000
#define L20_MCU_DM1_BK2 0x0400134100
#define L20_MCU_DM1_BK4 0x0400134200
#define L20_MCU_DM1_BK6 0x0400134300
#define L20_MCU_DM2_BK0 0x0800134000
#define L20_MCU_DM2_BK2 0x0800134100
#define L20_MCU_DM2_BK4 0x0800134200
#define L20_MCU_DM2_BK6 0x0800134300
#define L20_MCU_DM3_BK0 0x0c00134000
#define L20_MCU_DM3_BK2 0x0c00134100
#define L20_MCU_DM3_BK4 0x0c00134200
#define L20_MCU_DM3_BK6 0x0c00134300
#define L20_MCU_DM4_BK0 0x1000134000
#define L20_MCU_DM4_BK2 0x1000134100
#define L20_MCU_DM4_BK4 0x1000134200
#define L20_MCU_DM4_BK6 0x1000134300
#define L20_MCU_DM5_BK0 0x1400134000
#define L20_MCU_DM5_BK2 0x1400134100
#define L20_MCU_DM5_BK4 0x1400134200
#define L20_MCU_DM5_BK6 0x1400134300
#define L20_MCU_DM6_BK0 0x1800134000
#define L20_MCU_DM6_BK2 0x1800134100
#define L20_MCU_DM6_BK4 0x1800134200
#define L20_MCU_DM6_BK6 0x1800134300
#define L20_MCU_DM7_BK0 0x1c00134000
#define L20_MCU_DM7_BK2 0x1c00134100
#define L20_MCU_DM7_BK4 0x1c00134200
#define L20_MCU_DM7_BK6 0x1c00134300
#define L2_1_MCU_DM0_BK1 0x0000134040
#define L2_1_MCU_DM0_BK3 0x0000134140
#define L2_1_MCU_DM0_BK5 0x0000134240
#define L2_1_MCU_DM0_BK7 0x0000134340
#define L2_1_MCU_DM1_BK1 0x0400134040
#define L2_1_MCU_DM1_BK3 0x0400134140
#define L2_1_MCU_DM1_BK5 0x0400134240
#define L2_1_MCU_DM1_BK7 0x0400134340
#define L2_1_MCU_DM2_BK1 0x0800134040
#define L2_1_MCU_DM2_BK3 0x0800134140
#define L2_1_MCU_DM2_BK5 0x0800134240
#define L2_1_MCU_DM2_BK7 0x0800134340
#define L2_1_MCU_DM3_BK1 0x0c00134040
#define L2_1_MCU_DM3_BK3 0x0c00134140
#define L2_1_MCU_DM3_BK5 0x0c00134240
#define L2_1_MCU_DM3_BK7 0x0c00134340
#define L2_1_MCU_DM4_BK1 0x1000134040
#define L2_1_MCU_DM4_BK3 0x1000134140
#define L2_1_MCU_DM4_BK5 0x1000134240
#define L2_1_MCU_DM4_BK7 0x1000134340
#define L2_1_MCU_DM5_BK1 0x1400134040
#define L2_1_MCU_DM5_BK3 0x1400134140
#define L2_1_MCU_DM5_BK5 0x1400134240
#define L2_1_MCU_DM5_BK7 0x1400134340
#define L2_1_MCU_DM6_BK1 0x1800134040
#define L2_1_MCU_DM6_BK3 0x1800134140
#define L2_1_MCU_DM6_BK5 0x1800134240
#define L2_1_MCU_DM6_BK7 0x1800134340
#define L2_1_MCU_DM7_BK1 0x1c00134040
#define L2_1_MCU_DM7_BK3 0x1c00134140
#define L2_1_MCU_DM7_BK5 0x1c00134240
#define L2_1_MCU_DM7_BK7 0x1c00134340
#define L20_MCU_DM0_BK0 0x0000134000
#define L20_MCU_DM0_BK2 0x0000134080
#define L20_MCU_DM0_BK4 0x0000134100
#define L20_MCU_DM0_BK6 0x0000134180
#define L20_MCU_DM1_BK0 0x0200134000
#define L20_MCU_DM1_BK2 0x0200134080
#define L20_MCU_DM1_BK4 0x0200134100
#define L20_MCU_DM1_BK6 0x0200134180
#define L20_MCU_DM2_BK0 0x0400134000
#define L20_MCU_DM2_BK2 0x0400134080
#define L20_MCU_DM2_BK4 0x0400134100
#define L20_MCU_DM2_BK6 0x0400134180
#define L20_MCU_DM3_BK0 0x0600134000
#define L20_MCU_DM3_BK2 0x0600134080
#define L20_MCU_DM3_BK4 0x0600134100
#define L20_MCU_DM3_BK6 0x0600134180
#define L20_MCU_DM4_BK0 0x0800134000
#define L20_MCU_DM4_BK2 0x0800134080
#define L20_MCU_DM4_BK4 0x0800134100
#define L20_MCU_DM4_BK6 0x0800134180
#define L20_MCU_DM5_BK0 0x0a00134000
#define L20_MCU_DM5_BK2 0x0a00134080
#define L20_MCU_DM5_BK4 0x0a00134100
#define L20_MCU_DM5_BK6 0x0a00134180
#define L20_MCU_DM6_BK0 0x0c00134000
#define L20_MCU_DM6_BK2 0x0c00134080
#define L20_MCU_DM6_BK4 0x0c00134100
#define L20_MCU_DM6_BK6 0x0c00134180
#define L20_MCU_DM7_BK0 0x0e00134000
#define L20_MCU_DM7_BK2 0x0e00134080
#define L20_MCU_DM7_BK4 0x0e00134100
#define L20_MCU_DM7_BK6 0x0e00134180
#define L2_1_MCU_DM0_BK1 0x0000134040
#define L2_1_MCU_DM0_BK3 0x00001340c0
#define L2_1_MCU_DM0_BK5 0x0000134140
#define L2_1_MCU_DM0_BK7 0x00001341c0
#define L2_1_MCU_DM1_BK1 0x0200134040
#define L2_1_MCU_DM1_BK3 0x02001340c0
#define L2_1_MCU_DM1_BK5 0x0200134140
#define L2_1_MCU_DM1_BK7 0x02001341c0
#define L2_1_MCU_DM2_BK1 0x0400134040
#define L2_1_MCU_DM2_BK3 0x04001340c0
#define L2_1_MCU_DM2_BK5 0x0400134140
#define L2_1_MCU_DM2_BK7 0x04001341c0
#define L2_1_MCU_DM3_BK1 0x0600134040
#define L2_1_MCU_DM3_BK3 0x06001340c0
#define L2_1_MCU_DM3_BK5 0x0600134140
#define L2_1_MCU_DM3_BK7 0x06001341c0
#define L2_1_MCU_DM4_BK1 0x0800134040
#define L2_1_MCU_DM4_BK3 0x08001340c0
#define L2_1_MCU_DM4_BK5 0x0800134140
#define L2_1_MCU_DM4_BK7 0x08001341c0
#define L2_1_MCU_DM5_BK1 0x0a00134040
#define L2_1_MCU_DM5_BK3 0x0a001340c0
#define L2_1_MCU_DM5_BK5 0x0a00134140
#define L2_1_MCU_DM5_BK7 0x0a001341c0
#define L2_1_MCU_DM6_BK1 0x0c00134040
#define L2_1_MCU_DM6_BK3 0x0c001340c0
#define L2_1_MCU_DM6_BK5 0x0c00134140
#define L2_1_MCU_DM6_BK7 0x0c001341c0
#define L2_1_MCU_DM7_BK1 0x0e00134040
#define L2_1_MCU_DM7_BK3 0x0e001340c0
#define L2_1_MCU_DM7_BK5 0x0e00134140
#define L2_1_MCU_DM7_BK7 0x0e001341c0
! Preserve Thread id in %g4 left shifted 28 bits
setx 0x1111111111110000, %g7, %g5
setx L20_MCU_DM0_BK0, %g7, %o0
setx L20_MCU_DM0_BK2, %g7, %o1
setx L20_MCU_DM0_BK4, %g7, %o2
setx L20_MCU_DM0_BK6, %g7, %o3
setx L20_MCU_DM1_BK0, %g7, %o4
setx L20_MCU_DM1_BK2, %g7, %o5
setx L20_MCU_DM1_BK4, %g7, %o6
setx L20_MCU_DM1_BK6, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L20_dimm01_rd_wr
setx 0x1111111111110000, %g7, %g5
setx L20_MCU_DM2_BK0, %g7, %o0
setx L20_MCU_DM2_BK2, %g7, %o1
setx L20_MCU_DM2_BK4, %g7, %o2
setx L20_MCU_DM2_BK6, %g7, %o3
setx L20_MCU_DM3_BK0, %g7, %o4
setx L20_MCU_DM3_BK2, %g7, %o5
setx L20_MCU_DM3_BK4, %g7, %o6
setx L20_MCU_DM3_BK6, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L20_dimm23_rd_wr
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L20_MCU_DM4_BK0, %g7, %o0
setx L20_MCU_DM4_BK2, %g7, %o1
setx L20_MCU_DM4_BK4, %g7, %o2
setx L20_MCU_DM4_BK6, %g7, %o3
setx L20_MCU_DM5_BK0, %g7, %o4
setx L20_MCU_DM5_BK2, %g7, %o5
setx L20_MCU_DM5_BK4, %g7, %o6
setx L20_MCU_DM5_BK6, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L20_dimm45_rd_wr
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L20_MCU_DM6_BK0, %g7, %o0
setx L20_MCU_DM6_BK2, %g7, %o1
setx L20_MCU_DM6_BK4, %g7, %o2
setx L20_MCU_DM6_BK6, %g7, %o3
setx L20_MCU_DM7_BK0, %g7, %o4
setx L20_MCU_DM7_BK2, %g7, %o5
setx L20_MCU_DM7_BK4, %g7, %o6
setx L20_MCU_DM7_BK6, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L20_dimm67_rd_wr
/***********************************
***********************************/
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L2_1_MCU_DM0_BK1, %g7, %o0
setx L2_1_MCU_DM0_BK3, %g7, %o1
setx L2_1_MCU_DM0_BK5, %g7, %o2
setx L2_1_MCU_DM0_BK7, %g7, %o3
setx L2_1_MCU_DM1_BK1, %g7, %o4
setx L2_1_MCU_DM1_BK3, %g7, %o5
setx L2_1_MCU_DM1_BK5, %g7, %o6
setx L2_1_MCU_DM1_BK7, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L2_1_dimm01_rd_wr
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L2_1_MCU_DM0_BK1, %g7, %o0
setx L2_1_MCU_DM0_BK3, %g7, %o1
setx L2_1_MCU_DM0_BK5, %g7, %o2
setx L2_1_MCU_DM0_BK7, %g7, %o3
setx L2_1_MCU_DM1_BK1, %g7, %o4
setx L2_1_MCU_DM1_BK3, %g7, %o5
setx L2_1_MCU_DM1_BK5, %g7, %o6
setx L2_1_MCU_DM1_BK7, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L2_1_dimm23_rd_wr
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L2_1_MCU_DM0_BK1, %g7, %o0
setx L2_1_MCU_DM0_BK3, %g7, %o1
setx L2_1_MCU_DM0_BK5, %g7, %o2
setx L2_1_MCU_DM0_BK7, %g7, %o3
setx L2_1_MCU_DM1_BK1, %g7, %o4
setx L2_1_MCU_DM1_BK3, %g7, %o5
setx L2_1_MCU_DM1_BK5, %g7, %o6
setx L2_1_MCU_DM1_BK7, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L2_1_dimm45_rd_wr
/********************************
*********************************/
setx 0x1111111111110000, %g7, %g5
setx L2_1_MCU_DM0_BK1, %g7, %o0
setx L2_1_MCU_DM0_BK3, %g7, %o1
setx L2_1_MCU_DM0_BK5, %g7, %o2
setx L2_1_MCU_DM0_BK7, %g7, %o3
setx L2_1_MCU_DM1_BK1, %g7, %o4
setx L2_1_MCU_DM1_BK3, %g7, %o5
setx L2_1_MCU_DM1_BK5, %g7, %o6
setx L2_1_MCU_DM1_BK7, %g7, %o7
! to make the addr unique for each thread in PA[28] and up
setx 0xabcdef1234, %g7, %g2
brnz %g3, L2_1_dimm67_rd_wr
/******************************************************
*******************************************************/