* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: ifu_basic_branch.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
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* ========== Copyright Header End ============================================
!SECTION .MAIN TEXT_VA = 0xfffffffff0000000
! 1st fetch should be from RSTVaddr+0x20
! First intsruction fetched should be from here RSTVaddr+0x20
! First set up some registers with values ..
setx 0x524e4f2c0e9a829e, %g1, %g2
setx 0x21f892f023188c4b, %g1, %g3
setx 0x0b2a330b797f1524, %g1, %g4
setx 0xfffffffff0000000, %g1, %g5
setx 0x454f5c220664cd3c, %g1, %g6
setx 0x5d7085ae11898343, %g1, %g7
! Now do some useful stuff ..
setx 0x524e4f2c0e9a829e, %g1, %g2
setx 0x21f892f023188c4b, %g1, %g3
setx 0x0b2a330b797f1524, %g1, %g4
setx 0xfffffffff0000000, %g1, %g5
setx 0x454f5c220664cd3c, %g1, %g6
setx 0x5d7085ae11898343, %g1, %g7
! Now do some useful stuff ..
setx 0x524e4f2c0e9a829e, %g1, %g2
setx 0x21f892f023188c4b, %g1, %g3
setx 0x0b2a330b797f1524, %g1, %g4
setx 0xfffffffff0000000, %g1, %g5
setx 0x454f5c220664cd3c, %g1, %g6
setx 0x5d7085ae11898343, %g1, %g7
! Now do some useful stuff ..
!# Initialize registers ..
!# Execute some ALU ops ..
b9: brz %g7, not_taken_cases
B0: addcc %g0, 0x0001, %g2
B1: addcc %g0, 0x0001, %g2
B2: addcc %g0, 0x0000, %g2
B3: addcc %g0, 0x0001, %g2
B4: addcc %g0, 0x0000, %g2
B5: addcc %g0, 0x0001, %g2
B6: addcc %g0, 0x0000, %g2
B7: addcc %g0, 0x0000, %g2
B8: addcc %g0, 0x0001, %g2
B9: addcc %g0, 0x0000, %g2
B10: addcc %g0, 0x0001, %g2
B11: addcc %g0, 0x0002, %g2
B12: addcc %g0, 0x0000, %g2
B13: addcc %g0, 0x0001, %g2
setx 0x524e4f2c0e9a829e, %g1, %g2
setx 0x0000000080000000, %g1, %g3
setx 0x7fffffff7fffffff, %g1, %g4
setx 0x0000000080000000, %g1, %g5
setx 0x0000000000000000, %g1, %g6
setx 0x5d7085ae11898343, %g1, %g7
! Now do some useful stuff ..
! unconditional Branches (BA, BN)
! Icc-Conditional Branches (if taken, no annul)
!BPr1 = 00.0..1011......................
!BPr2 = 00.0.1.011......................
!BiccA = 00..000010......................
!Bicc1 = 00..1..010......................
!Bicc2 = 00...1.010......................
!Bicc3 = 00....1010......................
!BPccA = 00..000001......................
!BPcc1 = 00..1..001......................
!BPcc2 = 00...1.001......................
!BPcc3 = 00....1001......................
C0a: addcc %g0, 0x0001, %g2
C0: addcc %g0, 0x0001, %g2
C1a: addcc %g0, 0x0001, %g2
C1: addcc %g0, 0x0001, %g2
C2a: addcc %g0, 0x0001, %g2
C2b: addcc %g0, 0x0001, %g2
C2c: addcc %g0, 0x0000, %g2
C2d: addcc %g0, 0x0000, %g2
C3a: addcc %g0, 0x0000, %g1
C3b: addcc %g0, 0x0000, %g1
C3c: addcc %g0, 0x0001, %g2
C3d: addcc %g0, 0x0001, %g2
C4a: addcc %g0, 0x0001, %g1
C4b: addcc %g0, 0x0001, %g1
C4c: addcc %g0, 0x0000, %g1
C4d: addcc %g0, 0x0000, %g1
C5a: addcc %g0, 0x0000, %g1
C5b: addcc %g0, 0x0000, %g2
C5c: addcc %g0, 0x0001, %g2
C5d: addcc %g0, 0x0001, %g2
C6a: addcc %g0, 0x0000, %g1
C6b: addcc %g0, 0x0000, %g1
C6c: subcc %g0, 0x0001, %g1
C6d: subcc %g0, 0x0001, %g1
C7a: addcc %g0, 0x1fff, %g2
C7b: addcc %g0, 0x1fff, %g2
C7c: addcc %g0, 0x0000, %g1
C7d: addcc %g0, 0x0000, %g1
C8a: addcc %g0, 0x0001, %g1
C8b: addcc %g0, 0x0001, %g1
C8c: addcc %g0, 0x0000, %g2
C8d: addcc %g0, 0x0000, %g2
C9a: addcc %g0, 0x0000, %g2
C9b: addcc %g0, 0x0000, %g2
C9c: addcc %g0, 0x0001, %g2
C9d: addcc %g0, 0x1fff, %g2
C10a: addcc %g0, 0x0001, %g6
C10b: addcc %g0, 0x0001, %g6
C10c: addcc %g1, 0x0001, %g5
C10d: addcc %g1, 0x0001, %g5
C11a: addcc %g1, 0x0001, %g5
C11b: addcc %g1, 0x0001, %g5
C11c: addcc %g0, 0x0001, %g6
C11d: addcc %g0, 0x0001, %g6
C12a: addcc %g0, 0x0000, %g2
C12b: addcc %g0, 0x0002, %g2
C12c: subcc %g0, 0x0001, %g5
C12d: subcc %g0, 0x0001, %g5
C13a: subcc %g0, 0x0001, %g5
C13b: subcc %g0, 0x0001, %g5
C13c: addcc %g0, 0x0000, %g2
C13d: addcc %g0, 0x0000, %g1
C14a: addcc %g0, 0x0001, %g2
C14b: addcc %g0, 0x0001, %g2
C14c: addcc %g4, 0x0002, %g5
C14d: addcc %g4, 0x0001, %g5
C15a: addcc %g4, 0x0001, %g5
C15b: addcc %g4, 0x0001, %g5
C15c: addcc %g0, 0x0001, %g2
C15d: addcc %g0, 0x0001, %g2
!SECTION .DATA TEXT_VA = 0xffffff0000000000