* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: isa3_window0_f0.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* For the avoidance of doubt, and except that if any non-GPL license
* choice is available it will apply instead, Sun elects to use only
* the General Public License version 2 (GPLv2) at this time for any
* software where a choice of GPL license versions is made
* available with the language indicating that GPLv2 or any later version
* may be used, or where a choice of which version of the GPL is applied is
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
* CA 95054 USA or visit www.sun.com if you need additional information or
* ========== Copyright Header End ============================================
.ident "Using Instruction Hash for Focus :$Id: isa3_window0_f0.s,v 1.1.1.1 2007/02/13 22:20:15 drp Exp $"
/************************************************************************
************************************************************************/
setx DIAG_DATA_AREA, %g1, %g3
setx 0x62A5A048404FF33D, %l0, %l6
!# Initialize registers ..
INIT_TH_FP_REG(%l7,%f0,0x0BC8FABCA292EF5F)
INIT_TH_FP_REG(%l7,%f2,0x751C4DF99DF29016)
INIT_TH_FP_REG(%l7,%f4,0x2BC2E1C9267C3429)
INIT_TH_FP_REG(%l7,%f6,0xD19FB2A0B2F9DF68)
INIT_TH_FP_REG(%l7,%f8,0x962773EA981CD054)
INIT_TH_FP_REG(%l7,%f10,0x4AB62F57416F2A9D)
INIT_TH_FP_REG(%l7,%f12,0x82E5CA245A235A58)
INIT_TH_FP_REG(%l7,%f14,0x34966908FFE9F35F)
INIT_TH_FP_REG(%l7,%f16,0x3374366228CD3C94)
INIT_TH_FP_REG(%l7,%f18,0x479C965F14DCD008)
INIT_TH_FP_REG(%l7,%f20,0xFC9B0FF1C98B3680)
INIT_TH_FP_REG(%l7,%f22,0xA8526CED898862A2)
INIT_TH_FP_REG(%l7,%f24,0x30B7D0F76EBA71D0)
INIT_TH_FP_REG(%l7,%f26,0x6268B8D8587F5591)
INIT_TH_FP_REG(%l7,%f28,0x42877E489503D57E)
INIT_TH_FP_REG(%l7,%f30,0x16C2652C89801E5A)
wrhpr %l0, %g0, %hsys_tick_cmpr
faligndata %f6, %f28, %f30
fmovspos %xcc, %f13, %f21
fpsub32s %f14, %f12, %f19
fandnot2 %f26, %f22, %f16
fmul8x16 %f18, %f14, %f12
fmovrdlez %l2, %f22, %f12
fmul8ulx16 %f0, %f4, %f14
loop_0: xnor %o5, %g6, %l6
fmuld8sux16 %f23, %f30, %f24
loop_1: add %l5, %l3, %i4
fandnot2 %f30, %f24, %f26
fmuld8ulx16 %f11, %f9, %f24
fmul8x16au %f3, %f12, %f22
fmuld8ulx16 %f3, %f1, %f22
fmovsleu %icc, %f19, %f22
fmul8ulx16 %f30, %f26, %f26
fandnot1s %f10, %f16, %f11
fmul8sux16 %f10, %f8, %f6
fmuld8ulx16 %f2, %f7, %f18
fandnot1s %f8, %f31, %f22
fmovrsgez %g7, %f27, %f20
fandnot2s %f20, %f26, %f9
fmuld8ulx16 %f14, %f24, %f22
fmuld8sux16 %f1, %f24, %f6
fandnot1s %f21, %f23, %f24
bshuffle %f12, %f20, %f20
fmovdpos %icc, %f16, %f21
faligndata %f0, %f4, %f16
fmul8sux16 %f28, %f24, %f22
fmul8sux16 %f6, %f2, %f28
fmovspos %xcc, %f27, %f31
fandnot2s %f22, %f24, %f22
loop_2: mulscc %l5, %g4, %o2
fmovsleu %xcc, %f29, %f23
faligndata %f18, %f2, %f24
fmovrsgez %i2, %f22, %f23
fornot2s %f20, %f22, %f28
fandnot2 %f12, %f22, %f30
faligndata %f22, %f6, %f28
fandnot1s %f23, %f1, %f21
fmuld8sux16 %f26, %f24, %f0
fmul8x16 %f16, %f18, %f26
fmovsneg %icc, %f15, %f14
loop_4: srl %l6, %i6, %o1
fmovrsgez %l6, %f10, %f16
faligndata %f22, %f4, %f30
bshuffle %f24, %f10, %f28
fmuld8ulx16 %f13, %f0, %f10
loop_5: subcc %i3, %o1, %i6
faligndata %f26, %f20, %f0
loop_6: array32 %o6, %o3, %i7
fmul8x16au %f30, %f23, %f0
fmuld8sux16 %f24, %f25, %f14
fmovrdgez %i7, %f12, %f22
fmuld8ulx16 %f25, %f14, %f22
loop_7: movn %icc, %o4, %i6
fmul8x16au %f17, %f30, %f28
fmul8sux16 %f26, %f16, %f30
fmovrdgez %l6, %f28, %f12
fmovrdgez %o3, %f16, %f10
fpadd16s %f20, %f31, %f23
fmul8ulx16 %f0, %f26, %f26
fornot1s %f20, %f26, %f18
fmovdleu %icc, %f17, %f17
fmovrdgez %o2, %f12, %f24
faligndata %f30, %f16, %f20
fmul8sux16 %f8, %f10, %f2
fmuld8ulx16 %f21, %f30, %f14
fmul8sux16 %f24, %f20, %f14
fmul8x16au %f1, %f10, %f6
fandnot2s %f27, %f29, %f1
fmovdleu %xcc, %f15, %f16
fpadd16s %f31, %f14, %f31
fandnot2 %f28, %f24, %f30
fmovdpos %icc, %f11, %f31
fmovrslez %l3, %f13, %f23
fmul8ulx16 %f22, %f16, %f0
loop_8: fcmpgt32 %f10, %f18, %o6
fmuld8sux16 %f24, %f9, %f10
fmovrdlez %o7, %f18, %f24
fmovrslez %l0, %f14, %f12
fmovrslez %g4, %f11, %f29
fandnot1s %f23, %f30, %f27
fmul8ulx16 %f30, %f28, %f4
bshuffle %f30, %f30, %f18
fmul8x16al %f27, %f12, %f0
fmovdpos %icc, %f22, %f13
fmovrsgez %l5, %f19, %f26
fmul8sux16 %f18, %f12, %f14
fmovrsgez %l5, %f20, %f20
fpsub16s %f26, %f20, %f16
fmul8x16 %f30, %f10, %f24
fmul8sux16 %f20, %f10, %f0
fmovrdgez %i4, %f14, %f24
fmul8sux16 %f12, %f2, %f28
fmul8ulx16 %f4, %f12, %f14
fandnot2 %f18, %f28, %f12
fandnot1 %f26, %f30, %f10
fmovdleu %xcc, %f16, %f23
loop_9: fmovsvc %icc, %f4, %f17
fmovrsgez %g5, %f14, %f17
bshuffle %f16, %f10, %f20
fmul8sux16 %f22, %f8, %f28
faligndata %f16, %f2, %f16
fpadd16s %f11, %f20, %f24
fmovspos %xcc, %f10, %f17
bshuffle %f30, %f30, %f18
fmuld8ulx16 %f4, %f13, %f12
fmul8x16al %f30, %f31, %f12
fmovdpos %icc, %f12, %f16
fmovdneg %icc, %f12, %f27
fmul8x16al %f15, %f23, %f8
fmovsneg %icc, %f31, %f27
loop_10: umulcc %l3, 0x1F00, %i3
fornot1s %f16, %f24, %f20
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
EXIT_GOOD /* test finish */
/************************************************************************
************************************************************************/