verif/diag/assembly/peu/PCIeMemRd.s

/*
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*
* OpenSPARC T2 Processor File: PCIeMemRd.s
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#define ENABLE_PCIE_LINK_TRAINING
/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
#define MAIN_PAGE_HV_ALSO

#include "hboot.s"
#include "peu_defines.h"

#define MEM_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)

/************************************************************************
   Test case code start
 ************************************************************************/
.text
.global main

main:
        ta T_CHANGE_HPRIV
        nop

        ! select a CFG address in PCI address range and transmit the command to NCU

        ! load byte
        setx MEM_RD_ADDR, %g1, %g2
        ldub [%g2], %l0

        ! load half-word
        setx MEM_RD_ADDR, %g1, %g2
        lduh [%g2], %l0

        ! Load word
        setx MEM_RD_ADDR, %g1, %g2
        lduw [%g2], %l0

        ! Load dword
        setx MEM_RD_ADDR, %g1, %g2
        ldx  [%g2], %l0


test_passed:
        EXIT_GOOD

test_failed:
        EXIT_BAD


/************************************************************************
   Test case data start
************************************************************************/

SECTION       .DATA DATA_VA=MEM_RD_ADDR
attr_data {
      Name = .DATA,
      hypervisor,
      compressimage
}

.data
data0:  .word 0x44556677
data1:  .word 0x8899aabb
data2:  .word 0xccccdddd
data3:  .word 0xeeeeffff
/************************************************************************/