verif/diag/assembly/peu/PCIeMemWr.s

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* OpenSPARC T2 Processor File: PCIeMemWr.s
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#define ENABLE_PCIE_LINK_TRAINING
/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
#define MAIN_PAGE_HV_ALSO

#include "hboot.s"
#include "peu_defines.h"

#define MEM_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)

/************************************************************************
   Test case code start
 ************************************************************************/
.text
.global main

main:
        ta T_CHANGE_HPRIV
        nop

        ! select a Mem address in PCI address range and transmit the command to NCU

        ! store byte
        setx    MEM_WR_ADDR, %g1, %g2
        setx    0x23222120, %g1, %l0
        stb     %l0, [%g2]

        ! store half-word
        setx    MEM_WR_ADDR, %g1, %g2
        setx    0x33323130, %g1, %l0
        sth     %l0, [%g2]

        ! store word
        setx    MEM_WR_ADDR, %g1, %g2
        setx    0x7f7e7d7c, %g1, %l0
        stw     %l0, [%g2]

        ! store dword
        setx    MEM_WR_ADDR, %g1, %g2
        setx    0x3335373992828384, %g1, %l0
        stx     %l0, [%g2]


test_passed:
        EXIT_GOOD

test_failed:
        EXIT_BAD