// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: ccu.diaglist
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<sys(ccu_clk_ratios) name=sys(ccu_clk_ratios)>
<fc_ccu_166> // fc bench: default is 166mhz sys clk
<runargs -config_cpp_args=-DIDT_AMB> // build with IDT AMB model
<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1> // single thread (ie. thread 0)
<runargs -midas_args=-DRESET_STAT_CHECK> // must specify this option when doing WMR reset
<runargs -nofast_boot -vcs_run_args=+NO_CCU_CSR_SLAM -midas_args=-DCCU_REG_PROG -midas_args=-DWARM_RESET_INIT>
<runargs -sas -midas_args=-DBOOTPROM_INIT>
<runargs -vcs_run_args=+SSI_CLK_4 -vcs_run_args=+show_delta>
<runargs -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+l2esr_mon_off>
<runargs -vcs_run_args=+ccu_checker>
memop_all_atomics_CMPDR_RATIO_2_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_00
memop_all_atomics_CMPDR_RATIO_2_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_25
memop_all_atomics_CMPDR_RATIO_2_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_50
memop_all_atomics_CMPDR_RATIO_2_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_75
memop_all_atomics_CMPDR_RATIO_3_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_00
memop_all_atomics_CMPDR_RATIO_3_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_25
memop_all_atomics_CMPDR_RATIO_3_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_50
memop_all_atomics_CMPDR_RATIO_3_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_75
memop_all_atomics_CMPDR_RATIO_4_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_00
memop_all_atomics_CMPDR_RATIO_4_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_25
memop_all_atomics_CMPDR_RATIO_4_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_50
//---- Add these groups/regressions if needed -----
// <fc_ccu_133> // NOTE: requires fsr's rtl and IDT AMB model, so put them
// </fc_ccu_133> // in a separate file (ie. ccu_sysclk133.diaglist)
// <fc_ccu_200> // NOTE: fc bench does not support 200mhz sys clk yet.
projects / OpenSPARC-T2-DV / blob