Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / fc / fc.diaglist
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: fc.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
//
// ========== Copyright Header End ============================================
<sys(fc_all)>
<sys(all)>
<sys(daily)>
<sys(cmp) name=sys(cmp)>
////////////////////////////////////////////////////////////////////////////
// CMT diags, 1 core
<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DTHREAD_COUNT=2>
cmp_park_self cmp_park_self.s -midas_args=-DSYNC_THREADS -midas_args=-allow_tsb_conflicts
</runargs>
</sys(cmp)>
<sys(interrupt) name=sys(interrupt)>
////////////////////////////////////////////////////////////////////////////
// Single-threaded interrupt diags
<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1>
interrupt_INT_VEC_DIS interrupt_INT_VEC_DIS.s
interrupt_INT_VEC_DIS_all2 interrupt_INT_VEC_DIS_all2.s
interrupt_SWVR_INTR_R interrupt_SWVR_INTR_R.s
interrupt_SWVR_INTR_W interrupt_SWVR_INTR_W.s
interrupt_SWVR_INTR_W_all_vectors interrupt_SWVR_INTR_W_all_vectors.s
interrupt_INTR_REC_priority interrupt_INTR_REC_priority.s
interrupt_QUEUE_CPU_MONDO_trap interrupt_QUEUE_CPU_MONDO_trap.s
interrupt_QUEUE_DEV_MONDO_trap interrupt_QUEUE_DEV_MONDO_trap.s
interrupt_SPU_interrupt interrupt_SPU_interrupt.s
interrupt_ncu_regs_rw interrupt_ncu_regs_rw.s
interrupt_QUEUE_CPU_MONDO_mode interrupt_QUEUE_CPU_MONDO_mode.s
interrupt_QUEUE_DEV_MONDO_mode interrupt_QUEUE_DEV_MONDO_mode.s
interrupt_DMU_CORE_BLK_enable1 interrupt_DMU_CORE_BLK_enable1.s
interrupt_pci_regs interrupt_pci_regs.s
interrupt_pci_pwr_msg interrupt_pci_pwr_msg.s -vcs_run_args=+PEU_TEST
</runargs>
////////////////////////////////////////////////////////////////////////////
// 2-threaded interrupt diags
<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DSYNC_THREADS >
interrupt_SWVR_INTR_REC_mode interrupt_SWVR_INTR_REC_mode.s
interrupt_SWVR_INTR_R_mode interrupt_SWVR_INTR_R_mode.s
interrupt_SWVR_INTR_W_mode interrupt_SWVR_INTR_W_mode.s
</runargs>
////////////////////////////////////////////////////////////////////////////
// Miscellaneous interrupt diags
interrupt_dmu_cntrl_stall interrupt_dmu_cntrl_stall.s -midas_args=-DCMP_THREAD_START=0xf -finish_mask=f -vcs_run_args=+PEU_TEST
interrupt_pci_spurious_INTX interrupt_pci_spurious_INTX.s -vcs_run_args=+PEU_TEST -nosas
interrupt_pci_spurious_err interrupt_pci_spurious_err.s -nosas
interrupt_niu_regs_rw interrupt_niu_regs_rw.s
interrupt_INT_MAN_vector interrupt_INT_MAN_vector.s
interrupt_niu_device_id interrupt_niu_device_id.s -nosas
////////////////////////////////////////////////////////////////////////////
// 8-threaded interrupt diags
<runargs -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff >
interrupt_INT_MAN_thread interrupt_INT_MAN_thread.s
<runargs -vcs_run_args=+PEU_TEST -nosas>
interrupt_dmu_intr_reloc interrupt_dmu_intr_reloc.s -midas_args=-DTHREAD_COUNT=8 -midas_args=-DSKIP_EQ_CHECK
interrupt_mix interrupt_mix.s
interrupt_pci_dup_intx interrupt_pci_dup_intx.s
interrupt_pci_multiple_INTX interrupt_pci_multiple_INTX.s
</runargs>
</runargs>
////////////////////////////////////////////////////////////////////////////
// NIU interrupt diags
<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
<runargs -vcs_run_args=+TX_INT_MARK=1 >
<runargs -midas_args=-DNIU_TX_DMA_NUM=0 -midas_args=-DNIU_TX_PKT_CNT=1 >
<runargs -midas_args=-DNIU_TX_DMA_ACT_LIST=1 >
<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 >
interrupt_ether_send interrupt_ether_send.s
interrupt_niu_sys_data interrupt_niu_sys_data.s
</runargs> // thread=0x1
</runargs> // NIU_TX_DMA_ACT_LIST
</runargs> // NIU_TX_DMA_NUM
</runargs> // TX_INT_MARK
interrupt_niutx interrupt_niutx.s -vcs_run_args=+NIU_TX_MARK_LAST_PACKET_FOR_INTERRUPT -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3
</runargs> // TX_TEST
<runargs -midas_args=-DRX_TEST -midas_args=-DMAC_ID=0 >
<runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=20 -midas_args=-DSKIP_TRAPCHECK >
interrupt_niurx interrupt_niurx.s -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3
</runargs> // RX_TEST
</runargs> // RXMAC_PKTCNT
</runargs> // PEU_TEST
<runargs -midas_args=-DMAC_RX_FRAME_INTR >
//interrupt_MAC interrupt_MAC.s
</runargs> // MAC_RX_FRAME_INTR
</runargs> // ORIG_META
</runargs> // displaySysRdWr
</runargs> // PCS_SERDES
</runargs> // GET_MAC_PORTS
</runargs> // MAC_SPEED1
</runargs> // MAC_SPEED0
interrupt_ether_receive interrupt_ether_receive.s -sas
</sys(interrupt)>
////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////
<sys(peu_daily) name=sys(peu_daily)>
<runargs -sas >
// NcuRegRw NcuRegRw.s
RegRdReset RegRdReset.s
Bug103049 Bug103049.s
PCIeWrPeuDiagCsr PCIeWrPeuDiagCsr.s
<runargs -vcs_run_args=+PEU_TEST>
PCIeCFGRd PCIeCFGRd.s
PCIeCFGWr PCIeCFGWr.s
PCIeCFG0Rw PCIeCFG0Rw.s
PCIeIORw PCIeIORw.s
PCIeIORw_pll PCIeIORw.s -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4
PCIeMemRd PCIeMemRd.s
PCIeMemWr PCIeMemWr.s
PCIeMem32Rd PCIeMem32Rd.s
PCIeMem64Rd PCIeMem64Rd.s
PCIeMem64Rd32 PCIeMem64Rd32.s -nosas
PCIeMem64RdWr PCIeMem64RdWr.s
PCIeMem32AllBMsk PCIeMem32AllBMsk.s
PCIeMem64AllBMsk PCIeMem64AllBMsk.s
PCIeMem32AllBMsk2 PCIeMem32AllBMsk2.s
PCIeMem64AllBMsk2 PCIeMem64AllBMsk2.s
PCIeIOAllBMsk PCIeIOAllBMsk.s
PCIeCFG1AllBMsk PCIeCFG1AllBMsk.s
PCIeBadPIOAccess PCIeBadPIOAccess.s -vcs_run_args=+ios_0in_ras_chk_off
PCIeDMARw PCIeDMARw.s
PCIeIntx PCIeIntx.s
PCIeMsi PCIeMsi.s
PCIeRFE6298418 PCIeRFE6298418.s
PCIeDMAWrAdr32 PCIeDMAWrAdr32.s
PCIeDMAWrAdr64 PCIeDMAWrAdr64.s
PCIeDMARdAdr32 PCIeDMARdAdr32.s
PCIeDMARdAdr64 PCIeDMARdAdr64.s
PCIeDMARdPerf PCIeDMARdPerf.s
PCIeDMAWrPerf PCIeDMAWrPerf.s
PCIeDMARdAllCacheLineOffsets PCIeDMARdAllCacheLineOffsets.s -vcs_run_args=+bank_set_mask=f
PCIeDMAWrAllCacheLineOffsets PCIeDMAWrAllCacheLineOffsets.s -vcs_run_args=+bank_set_mask=f
PCIeIommu4U64kTr PCIeIommu4U64kTr.s
PCIeIommu4U8kTr PCIeIommu4U8kTr.s
PCIeIommu4V64kTr PCIeIommu4V64kTr.s
PCIeIommu4V8kTr PCIeIommu4V8kTr.s
PCIeIommu4V4mTr PCIeIommu4V4mTr.s
PCIeIommu4V256mTr PCIeIommu4V256mTr.s -vcs_run_args=+4_FBDIMMS
PCIeIommu4UBypTrInv PCIeIommu4UBypTrInv.s
PCIeIommu4VBypTrInv PCIeIommu4VBypTrInv.s
PCIeIommu4VBadTr2 PCIeIommu4VBadTr2.s
PCIeDrainState PCIeDrainState.s -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+no_verilog_finish -vcs_run_args=+no_dmu2peu_ibc_req_ack
PCIePIOTimOut PCIePIOTimeout.s -vcs_run_args=+ios_0in_ras_chk_off
PCIePIOUc PCIePIOUc.s -vcs_run_args=+ios_0in_ras_chk_off
<runargs -vcs_run_args=+ios_0in_ras_chk_off -midas_args=-DPCIE_USE_SSYS_RESET >
PCIeEgrHPeDrainState PCIeEgrHPeDrainState.s
PCIeEgrDPeDrainState PCIeEgrDPeDrainState.s -vcs_run_args=+no_dmu2peu_edb_parity
PCIeIgrHPeDrainState PCIeIgrHPeDrainState.s
</runargs>
PCIeDMAWrNonContigDWBE PCIeDMAWrNonContigDWBE.s
PCIeDMA0LenRd PCIeDMA0LenRd.s
PCIeDMARdMPS128Rcb PCIeDMARdMPS128Rcb.s
PCIeDMARdMPS256Rcb PCIeDMARdMPS256Rcb.s
PCIeDMARdMPS512Rcb PCIeDMARdMPS512Rcb.s
// multi thread peu diags
<runargs -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff >
PCIeFireDeadlockScn1 PCIeFireDeadlockScn1.s
PCIeFireDeadlockScn2pm1 PCIeFireDeadlockScn2.s -midas_args=-DPEU_PIO_MODE=1 -vcs_run_args=+th_timeout=250000
PCIeFireDeadlockScn2pm2 PCIeFireDeadlockScn2.s -midas_args=-DPEU_PIO_MODE=2 -vcs_run_args=+th_timeout=250000
Bug107906 Bug107906.s -rtl_timeout=100000
</runargs>
PCIeMem64AdrCov PCIeMem64AdrCov.s -nosas
PCIeDMARdLk PCIeDMARdLk.s
PCIeReqId PCIeReqId.s
PCIeInterrupt PCIeInterrupt.s
</runargs>
</runargs>
</sys(peu_daily)>
<sys(pll) name=sys(pll)>
<runargs -sas>
<runargs -vcs_run_args=+bank_set_mask=3 -vcs_run_args=+core_set_mask=01>
memop_all_atomics_pll memop_all_atomics.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4 -vcs_run_args=+gchkr_off
</runargs>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
<runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
<runargs -midas_args=-DNIU_TX_DMA_NUM=1 -midas_args=-DNIU_TX_DMA_ACT_LIST=2 >
FcNiuTx_DMA1_pll FcNiuBasicTx.s -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</sys(pll)>
#include "fc_dbp.diaglist"
</sys(daily)>
</sys(all)>
</sys(fc_all)>