Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / fc / fc_fsr_err.diaglist
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: fc_fsr_err.diaglist
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<sys(fsr_all)>
<sys(L2err) name=sys(L2err)>
<runargs -fast_boot -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -nosas -vcs_run_args=+show_delta -max_cycle=+500000 >
n2_err_L2_FatalErr_WrmRst n2_err_L2_FatalErr_WrmRst.s
</runargs>
</sys(L2err)>
<sys(MCUerr) name=sys(MCUerr)>
<runargs -fast_boot -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -nosas -vcs_run_args=+show_delta -max_cycle=+100000 >
n2_err_dram_dac_dau_fbr_fbu_mcu0 n2_err_dram_ecc_crc_idt.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
n2_err_dram_dac_dau_fbr_fbu_mcu1 n2_err_dram_ecc_crc_idt.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
n2_err_dram_dac_dau_fbr_fbu_mcu2 n2_err_dram_ecc_crc_idt.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
n2_err_dram_dac_dau_fbr_fbu_mcu3 n2_err_dram_ecc_crc_idt.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
</runargs>
</sys(MCUerr)>
<sys(tcu) name=sys(tcu)>
<runargs -fast_boot -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -nosas -vcs_run_args=+show_delta -max_cycle=+500000 >
tcu_mbist tcu_mbist.s -nosas -vcs_run_args=+siu_0in_wb_chk_off -max_cycle=+500000
</runargs>
</sys(tcu)>
<sys(ios_err) name=sys(ios_err)>
<sys(idt_ras)>
<runargs -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB -sas -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 >
n2_err_adv_ncuctague_wrmreset n2_err_adv_ncuctague_wrmreset.s -midas_args=-DERR_FIELD=NcuCtagUe -vcs_run_args=+PEU_TEST
n2_err_adv_Dmu_AP_wrmreset n2_err_adv_Dmu_AP_wrmreset.s -vcs_run_args=+PEU_TEST
// niu
<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
<runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
n2_err_siu_niu_tx_wrmreset n2_err_siu_niu_tx_wrmreset.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off
n2_err_niu_tx_wrmreset_trans_ceen n2_err_niu_tx_wrmreset_trans_ceen.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off
n2_err_niu_tx_wrmreset_trans_ceen_nosas n2_err_niu_tx_wrmreset_trans_ceen.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off -nosas
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</runargs>
</sys(idt_ras)>
</sys(ios_err)>
</sys(fsr_all)>