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// OpenSPARC T2 Processor File: fc_niu_rx_P0P1_2DMA.diaglist
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<FcNiuRx_MP_2DMA name=FcNiuRx_MP_2DMA>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+no_verilog_finish >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
//KH <runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
//KH <runargs -midas_args=-DRXDMA_CHNL=0xf >
//KH FcNiuRx_DMA15 FcNiuBasicRx_sweep1.s
//KH <runargs -midas_args=-DXLATE_ON >
//KH FcNiuRx_DMA15_Xlate FcNiuBasicRx_sweep1.s
//KH <runargs -midas_args=-DMAC_PKT_LEN=0x251c -vcs_run_args=+WRCHK_TO=3400 -midas_args=-Dloop_count=100 >
//KH <runargs -midas_args=-DJUMBO_FRAME_EN >
//KH FcNiuRx_DMA15_Xlate_Jumbo FcNiuBasicRx_sweep1.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x11 -vcs_run_args=+NIU_RX_MULTI_DMA=11 >
FcNiuRx_MP_2DMA_1_1 rx_p0p1_MULTI_2DMA_rand_11.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x21 -vcs_run_args=+NIU_RX_MULTI_DMA=21 >
FcNiuRx_MP_2DMA_2_1 rx_p0p1_MULTI_2DMA_rand_21.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x41 -vcs_run_args=+NIU_RX_MULTI_DMA=41 >
FcNiuRx_MP_2DMA_4_1 rx_p0p1_MULTI_2DMA_rand_41.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x81 -vcs_run_args=+NIU_RX_MULTI_DMA=81 >
FcNiuRx_MP_2DMA_8_1 rx_p0p1_MULTI_2DMA_rand_81.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x12 -vcs_run_args=+NIU_RX_MULTI_DMA=12 >
FcNiuRx_MP_2DMA_1_2 rx_p0p1_MULTI_2DMA_rand_12.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x22 -vcs_run_args=+NIU_RX_MULTI_DMA=22 >
FcNiuRx_MP_2DMA_2_2 rx_p0p1_MULTI_2DMA_rand_22.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x42 -vcs_run_args=+NIU_RX_MULTI_DMA=42 >
FcNiuRx_MP_2DMA_4_2 rx_p0p1_MULTI_2DMA_rand_42.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x82 -vcs_run_args=+NIU_RX_MULTI_DMA=82 >
FcNiuRx_MP_2DMA_8_2 rx_p0p1_MULTI_2DMA_rand_82.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x14 -vcs_run_args=+NIU_RX_MULTI_DMA=14 >
FcNiuRx_MP_2DMA_1_4 rx_p0p1_MULTI_2DMA_rand_14.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x24 -vcs_run_args=+NIU_RX_MULTI_DMA=24 >
FcNiuRx_MP_2DMA_2_4 rx_p0p1_MULTI_2DMA_rand_24.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x44 -vcs_run_args=+NIU_RX_MULTI_DMA=44 >
FcNiuRx_MP_2DMA_4_4 rx_p0p1_MULTI_2DMA_rand_44.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x84 -vcs_run_args=+NIU_RX_MULTI_DMA=84 >
FcNiuRx_MP_2DMA_8_4 rx_p0p1_MULTI_2DMA_rand_84.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x18 -vcs_run_args=+NIU_RX_MULTI_DMA=18 >
FcNiuRx_MP_2DMA_1_8 rx_p0p1_MULTI_2DMA_rand_18.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x28 -vcs_run_args=+NIU_RX_MULTI_DMA=28 >
FcNiuRx_MP_2DMA_2_8 rx_p0p1_MULTI_2DMA_rand_28.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x48 -vcs_run_args=+NIU_RX_MULTI_DMA=48 >
FcNiuRx_MP_2DMA_4_8 rx_p0p1_MULTI_2DMA_rand_48.s
<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 -midas_args=-DNIU_RX_PKT_LEN=0x100 >
<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x88 -vcs_run_args=+NIU_RX_MULTI_DMA=88 >
FcNiuRx_MP_2DMA_8_8 rx_p0p1_MULTI_2DMA_rand_88.s
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