verif/env/common/coverage/dmu/dmu_cmu_maxpyld_sample.vrh

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// OpenSPARC T2 Processor File: dmu_cmu_maxpyld_sample.vrh
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sample cov_dmu_cmu_maxpyld (dmu_cmu_coverage.maxpyld)
{

// invalid default case state DMU_CMU_MAXPYLD_PSB_ADR_00  ( 11'b00000010000 );
state DMU_CMU_MAXPYLD_PSB_ADR_01  ( 11'b00000100000 ) if (ilu_dmu_mps==3'b000);
state DMU_CMU_MAXPYLD_PSB_ADR_02  ( 11'b00001000000 ) if (ilu_dmu_mps==3'b001);
state DMU_CMU_MAXPYLD_PSB_ADR_03  ( 11'b00010000000 ) if (ilu_dmu_mps==3'b010);

}