Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / l2sat / l2_dir_lookup_sample.vrhpal
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: l2_dir_lookup_sample.vrhpal
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
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// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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// choice is available it will apply instead, Sun elects to use only
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// ========== Copyright Header End ============================================
wildcard state idir_bank0_row0( { 4'bxxx1, 1'bx, 2'h0, 7'bx} );
wildcard state idir_bank0_row1( { 4'bxxx1, 1'bx, 2'h1, 7'bx} );
wildcard state idir_bank0_row2( { 4'bxxx1, 1'bx, 2'h2, 7'bx} );
wildcard state idir_bank0_row3( { 4'bxxx1, 1'bx, 2'h3, 7'bx} );
// wildcard state idir_bank0_row4( { 4'bxxx1, 3'h4, 7'bx} );
// wildcard state idir_bank0_row5( { 4'bxxx1, 3'h5, 7'bx} );
// wildcard state idir_bank0_row6( { 4'bxxx1, 3'h6, 7'bx} );
// wildcard state idir_bank0_row7( { 4'bxxx1, 3'h7, 7'bx} );
wildcard state idir_bank1_row0( { 4'bxx1x, 1'bx, 2'h0, 7'bx} );
wildcard state idir_bank1_row1( { 4'bxx1x, 1'bx, 2'h1, 7'bx} );
wildcard state idir_bank1_row2( { 4'bxx1x, 1'bx, 2'h2, 7'bx} );
wildcard state idir_bank1_row3( { 4'bxx1x, 1'bx, 2'h3, 7'bx} );
// wildcard state idir_bank1_row4( { 4'bxx1x, 3'h4, 7'bx} );
// wildcard state idir_bank1_row5( { 4'bxx1x, 3'h5, 7'bx} );
// wildcard state idir_bank1_row6( { 4'bxx1x, 3'h6, 7'bx} );
// wildcard state idir_bank1_row7( { 4'bxx1x, 3'h7, 7'bx} );
wildcard state idir_bank2_row0( { 4'bx1xx, 1'bx, 2'h0, 7'bx} );
wildcard state idir_bank2_row1( { 4'bx1xx, 1'bx, 2'h1, 7'bx} );
wildcard state idir_bank2_row2( { 4'bx1xx, 1'bx, 2'h2, 7'bx} );
wildcard state idir_bank2_row3( { 4'bx1xx, 1'bx, 2'h3, 7'bx} );
// wildcard state idir_bank2_row4( { 4'bx1xx, 3'h4, 7'bx} );
// wildcard state idir_bank2_row5( { 4'bx1xx, 3'h5, 7'bx} );
// wildcard state idir_bank2_row6( { 4'bx1xx, 3'h6, 7'bx} );
// wildcard state idir_bank2_row7( { 4'bx1xx, 3'h7, 7'bx} );
wildcard state idir_bank3_row0( { 4'b1xxx, 1'bx, 2'h0, 7'bx} );
wildcard state idir_bank3_row1( { 4'b1xxx, 1'bx, 2'h1, 7'bx} );
wildcard state idir_bank3_row2( { 4'b1xxx, 1'bx, 2'h2, 7'bx} );
wildcard state idir_bank3_row3( { 4'b1xxx, 1'bx, 2'h3, 7'bx} );
// wildcard state idir_bank3_row4( { 4'b1xxx, 3'h4, 7'bx} );
// wildcard state idir_bank3_row5( { 4'b1xxx, 3'h5, 7'bx} );
// wildcard state idir_bank3_row6( { 4'b1xxx, 3'h6, 7'bx} );
// wildcard state idir_bank3_row7( { 4'b1xxx, 3'h7, 7'bx} );
wildcard state ddir_bank0_row0( { 7'bx, 4'bxxx1, 1'bx, 2'h0} );
wildcard state ddir_bank0_row1( { 7'bx, 4'bxxx1, 1'bx, 2'h1} );
wildcard state ddir_bank0_row2( { 7'bx, 4'bxxx1, 1'bx, 2'h2} );
wildcard state ddir_bank0_row3( { 7'bx, 4'bxxx1, 1'bx, 2'h3} );
// wildcard state ddir_bank0_row4( { 7'bx, 4'bxxx1, 3'h4} );
// wildcard state ddir_bank0_row5( { 7'bx, 4'bxxx1, 3'h5} );
// wildcard state ddir_bank0_row6( { 7'bx, 4'bxxx1, 3'h6} );
// wildcard state ddir_bank0_row7( { 7'bx, 4'bxxx1, 3'h7} );
wildcard state ddir_bank1_row0( { 7'bx, 4'bxx1x, 1'bx, 2'h0} );
wildcard state ddir_bank1_row1( { 7'bx, 4'bxx1x, 1'bx, 2'h1} );
wildcard state ddir_bank1_row2( { 7'bx, 4'bxx1x, 1'bx, 2'h2} );
wildcard state ddir_bank1_row3( { 7'bx, 4'bxx1x, 1'bx, 2'h3} );
// wildcard state ddir_bank1_row4( { 7'bx, 4'bxx1x, 3'h4} );
// wildcard state ddir_bank1_row5( { 7'bx, 4'bxx1x, 3'h5} );
// wildcard state ddir_bank1_row6( { 7'bx, 4'bxx1x, 3'h6} );
// wildcard state ddir_bank1_row7( { 7'bx, 4'bxx1x, 3'h7} );
wildcard state ddir_bank2_row0( { 7'bx, 4'bx1xx, 1'bx, 2'h0} );
wildcard state ddir_bank2_row1( { 7'bx, 4'bx1xx, 1'bx, 2'h1} );
wildcard state ddir_bank2_row2( { 7'bx, 4'bx1xx, 1'bx, 2'h2} );
wildcard state ddir_bank2_row3( { 7'bx, 4'bx1xx, 1'bx, 2'h3} );
// wildcard state ddir_bank2_row4( { 7'bx, 4'bx1xx, 3'h4} );
// wildcard state ddir_bank2_row5( { 7'bx, 4'bx1xx, 3'h5} );
// wildcard state ddir_bank2_row6( { 7'bx, 4'bx1xx, 3'h6} );
// wildcard state ddir_bank2_row7( { 7'bx, 4'bx1xx, 3'h7} );
wildcard state ddir_bank3_row0( { 7'bx, 4'b1xxx, 1'bx, 2'h0} );
wildcard state ddir_bank3_row1( { 7'bx, 4'b1xxx, 1'bx, 2'h1} );
wildcard state ddir_bank3_row2( { 7'bx, 4'b1xxx, 1'bx, 2'h2} );
wildcard state ddir_bank3_row3( { 7'bx, 4'b1xxx, 1'bx, 2'h3} );
// wildcard state ddir_bank3_row4( { 7'bx, 4'b1xxx, 3'h4} );
// wildcard state ddir_bank3_row5( { 7'bx, 4'b1xxx, 3'h5} );
// wildcard state ddir_bank3_row6( { 7'bx, 4'b1xxx, 3'h6} );
// wildcard state ddir_bank3_row7( { 7'bx, 4'b1xxx, 3'h7} );
// }