Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / common / coverage / siu / siu_dmucmd_sample.vrhpal

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// 
// OpenSPARC T2 Processor File: siu_dmucmd_sample.vrhpal
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#inc "siu_cov_inc.pal";


#ifndef SIU_INTF_COV
sample siu_dmucmd_sample_this (this_dmu_cmd)
{
          state RDD_ord          ( 7'b0010_100 );
          state WRI_pstd_ord     ( 7'b0100_100 );
          state WRM_pstd_ord     ( 7'b0101_100 );
          state PIO_RD_RET       ( 7'b1010_011 );
          state INT              ( 7'b0000_010 );
          cov_weight = 0;
}

. $j = 5;
. $k = 2;
. for ($i=1; $i<11; $i++)
. {
   sample siu_dmucmd_sample_${i}_clk_last (last_dmu_cmd) 
   {
     state RDD_ord          ( 7'b0010_100 ) if (dmu_back_to_back == ${i});
     state WRI_pstd_ord     ( 7'b0100_100 ) if (dmu_back_to_back == ${j});
     state WRM_pstd_ord     ( 7'b0101_100 ) if (dmu_back_to_back == ${j});
     state PIO_RD_RET       ( 7'b1010_011 ) if (dmu_back_to_back == ${k});
     state INT              ( 7'b0000_010 ) if (dmu_back_to_back == ${k});
.     $j++;
.     $k++;
     cov_weight = 0;
   }
.}


// bins for back to back dmu commands
. for ($i=1; $i<11; $i++)
. {
   cross dmusiu_intf_inb_cmd_${i}_clk_cross (siu_dmucmd_sample_${i}_clk_last, siu_dmucmd_sample_this)
   {
    cov_weight = 1;
   }
.}

// make sure all bits of the dmc tag field are toggled.
sample dmusiu_intf_inb_dmctag_sample ( dmc_tag[15:0] ) 
{
. &toggle( 16 );

 cov_weight = 1;
}


#else
// FC
sample siu_dmucmd_sample_this (this_dmu_cmd)
{
          state RDD_ord          ( 7'b0010_100 );
          state WRI_pstd_ord     ( 7'b0100_100 );
          state WRM_pstd_ord     ( 7'b0101_100 );
          state PIO_RD_RET       ( 7'b1010_011 );
          state INT              ( 7'b0000_010 );
          cov_weight = 1;
}

. $j = 5;
. $k = 2;
. for ($i=1; $i<6; $i++)
. {
   sample siu_dmucmd_sample_${i}_clk_last (last_dmu_cmd)
   {
     state RDD_ord          ( 7'b0010_100 ) if (dmu_back_to_back == ${i});
     state WRI_pstd_ord     ( 7'b0100_100 ) if (dmu_back_to_back == ${j});
     state WRM_pstd_ord     ( 7'b0101_100 ) if (dmu_back_to_back == ${j});
     state PIO_RD_RET       ( 7'b1010_011 ) if (dmu_back_to_back == ${k});
     state INT              ( 7'b0000_010 ) if (dmu_back_to_back == ${k});
.     $j++;
.     $k++;
     cov_weight = 0;
   }
.}


// bins for back to back dmu commands
. for ($i=1; $i<6; $i++)
. {
   cross dmusiu_intf_inb_cmd_${i}_clk_cross (siu_dmucmd_sample_${i}_clk_last, siu_dmucmd_sample_this)
   {
    cov_weight = 1;
   }
.}

// make sure all bits of the dmc tag field are toggled.
sample dmusiu_intf_inb_dmctag_sample ( dmc_tag[15:0] )
{
. &toggle( 16 );

 cov_weight = 1;
}
#endif