verif/env/common/vera/ccxDevices/pcxPktClass.vrh

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: pcxPktClass.vrh
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
//
// ========== Copyright Header End ============================================
#ifndef INC__TMP_PCXPKTCLASS_VRH
#define INC__TMP_PCXPKTCLASS_VRH

typedef class BasePkt ;

extern class PcxPkt extends BasePkt {
  reg valid;
  reg nc;
  reg [2:0] cpuId;
  reg inv;
  reg pf;
  reg l1wayBis;
  reg [1:0] l1wayMMUid;
  reg [7:0] size;
  reg [63:0] data;

  task loadPkt (
    reg [145:0] data,
    integer atPort
  );
  function reg [145:0] getVector (
  );
  task print (
    integer atPort
  );
  task send (
    integer fastResp = 0
  );
  function reg [145:0] makeSignature (
  );
  task recv (
  );
  task createIntr(reg [5:0] thread, // 64 virtual cores
                  reg [1:0] type,
                  reg [5:0] vect);
  task recvPortByAddr();

}

#endif