// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: errorCountTasks.if.vrh
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// ========== Copyright Header End ============================================
#ifndef INC_ERRORCOUNTTASKS_IF_VRH
#define INC_ERRORCOUNTTASKS_IF_VRH
interface errorCount_if {
// input clk CLOCK hdl_node "tb_top.clk";
input errorCount NSAMPLE #-3 hdl_node "tb_top.error_count";
input warnCount NSAMPLE #-3 hdl_node "tb_top.warning_count";
//////////////////////////////////////////////////////////////////
// See errorCountTasks.v, dispmonDefines.vh,
// std_display_class.vr & .vri, errorCountTasks.if.vrh
//////////////////////////////////////////////////////////////////
// you can do something like this to watch for excessive counts in Vera
// task CLASSNAME::wait4termination () {
// integer myErrors = 0, myWarns = 0;
// fork // too many errors
// integer previousCountE = 0;
// integer previousCountW = 0;
// @(errorCount_if.errorCount or errorCount_if.warnCount); // watch verilog errors
// myErrors += (errorCount_if.errorCount - previousCountE);
// previousCountE = errorCount_if.errorCount;
// myWarns += (errorCount_if.warnCount - previousCountW);
// previousCountW = errorCount_if.warnCount;
// wait_var(gDbg.errorCount); // watch vera errors
// wait_var(gDbg.warnCount); // watch vera warns
// while (myErrors < gDbg.maxerror && myWarns < gDbg.maxwarning) wait_var(myErrors,myWarns);
// // We now have too many errors, do whatever...
// PR_ALWAYS (CLASSNAMEQ, ALWAYS,
// sprintf("Diag Ending with ERRORs. Errors=%0d, Warns=%0d (Vera)",myErrors,myWarns));
// repeat (gDbg.wait_cycle_to_kill) @(posedge CLOCK);
// // Please to not check every clock!
// // delay is measurably better than repeat (x) @(posedge CLOCK).
// // I asked Synopsys to measure it, really.
// delay(gClkPeriod*500);
// if (get_cycle() >= gParam.maxCycle) {
// PR_ALWAYS (CLASSNAMEQ, ALWAYS,
// sprintf("Max cycles of %0d exceeded! Exiting with ERRORs...",gParam.maxCycle));
projects / OpenSPARC-T2-DV / blob