// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: tiia_checkers.v
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// ========== Copyright Header End ============================================
`define tiia_top `CPU.dmu
`define tiia_clk `tiia_top.l1clk
//`define tiia_clk `tiia_top.iol2clk
`define tiia_rst ~`tiia_top.wmr_
//`define tiia_rst ~`tiia_top.rst_wmr_ // this is before it goes thru clk hdr
/* 0in known_driven -var `tiia_top.y2k_rcd_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.y2k_rcd
-active `tiia_top.y2k_rcd_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_rcd_deq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_rcd_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_rcd
-active `tiia_top.k2y_rcd_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.y2k_rcd_deq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_rel_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_rel_rcd
-active `tiia_top.k2y_rel_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.y2k_rel_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.y2k_rel_rcd
-active `tiia_top.y2k_rel_enq
-clock `tiia_clk -reset `tiia_rst */
/* 0in known_driven -var `tiia_top.k2y_buf_addr
-clock `tiia_clk -reset `tiia_rst */
// fails with simultaneous enq/deq
-enq `tiia_top.y2k_rcd_enq
-deq `tiia_top.k2y_rcd_deq
-clock `tiia_clk -reset `tiia_rst */
-enq `tiia_top.k2y_rcd_enq
-deq `tiia_top.y2k_rcd_deq
-clock `tiia_clk -reset `tiia_rst */
//////////////////////////
// ingress record checkers - see Fire MAS 5-586 table 7-1
wire [`FIRE_DLC_IPE_ADDR_WDTH-1:0] y2k_rcd_addr;
wire [`FIRE_DLC_IPE_FDWBE_WDTH-1:0] y2k_rcd_fdwbe;
wire [`FIRE_DLC_IPE_LDWBE_WDTH-1:0] y2k_rcd_ldwbe;
wire [`FIRE_DLC_IPE_TAG_WDTH-1:0] y2k_rcd_tag;
wire [`FIRE_DLC_IPE_REQID_WDTH-1:0] y2k_rcd_reqid;
wire [`FIRE_DLC_IPE_LEN_WDTH-1:0] y2k_rcd_len;
wire [`FIRE_DLC_IPE_ATR_WDTH-1:0] y2k_rcd_atr;
wire [`FIRE_DLC_IPE_TC_WDTH-1:0] y2k_rcd_tc;
wire [`FIRE_DLC_IPE_TYPE_WDTH-1:0] y2k_rcd_type;
wire [`FIRE_DLC_IPE_F_WDTH-1:0] y2k_rcd_f;
assign y2k_rcd_addr = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_ADDR_MSB:`FIRE_DLC_IPE_ADDR_LSB];
assign y2k_rcd_fdwbe = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_FDWBE_MSB:`FIRE_DLC_IPE_FDWBE_LSB];
assign y2k_rcd_ldwbe = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_LDWBE_MSB:`FIRE_DLC_IPE_LDWBE_LSB];
assign y2k_rcd_tag = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_TAG_MSB:`FIRE_DLC_IPE_TAG_LSB];
assign y2k_rcd_reqid = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_REQID_MSB:`FIRE_DLC_IPE_REQID_LSB];
assign y2k_rcd_len = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_LEN_MSB:`FIRE_DLC_IPE_LEN_LSB];
assign y2k_rcd_atr = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_ATR_MSB:`FIRE_DLC_IPE_ATR_LSB];
assign y2k_rcd_tc = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_TC_MSB:`FIRE_DLC_IPE_TC_LSB];
assign y2k_rcd_type = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_TYPE_MSB:`FIRE_DLC_IPE_TYPE_LSB];
assign y2k_rcd_f = `tiia_top.y2k_rcd[`FIRE_DLC_IPE_F_MSB:`FIRE_DLC_IPE_F_LSB];
IDMA_MRDLK32 = 7'b0000001,
IDMA_MRDLK64 = 7'b0100001,
// the lower 3 bits of a dma are dont-care
-var {y2k_rcd_f, y2k_rcd_type}
-val IDMA_MRD32 IDMA_MRD64 IDMA_MRDLK32 IDMA_MRDLK64 IDMA_MWR32 IDMA_MWR64
IDMA_UR IPIO_CPL IPIO_CPLD
IDMA_MSG0 IDMA_MSG1 IDMA_MSG2 IDMA_MSG3 IDMA_MSG4 IDMA_MSG5 IDMA_MSG6 IDMA_MSG7
-active `tiia_top.y2k_rcd_enq
/////////////////////////
// egress record checkers - see Fire MAS 5-596 table 7-21
wire [`FIRE_DLC_EPE_DPTR_WDTH-1:0] k2y_rcd_dptr;
wire [`FIRE_DLC_EPE_ADDR_WDTH-1:0] k2y_rcd_addr;
wire [`FIRE_DLC_EPE_FDWBE_WDTH-1:0] k2y_rcd_fdwbe;
wire [`FIRE_DLC_EPE_LDWBE_WDTH-1:0] k2y_rcd_ldwbe;
wire [`FIRE_DLC_EPE_TAG_WDTH-1:0] k2y_rcd_tag;
wire [`FIRE_DLC_EPE_REQID_WDTH-1:0] k2y_rcd_reqid;
wire [`FIRE_DLC_EPE_LEN_WDTH-1:0] k2y_rcd_len;
wire [`FIRE_DLC_EPE_ATR_WDTH-1:0] k2y_rcd_atr;
wire [`FIRE_DLC_EPE_TC_WDTH-1:0] k2y_rcd_tc;
wire [`FIRE_DLC_EPE_TYPE_WDTH-1:0] k2y_rcd_type;
wire [`FIRE_DLC_EPE_F_WDTH-1:0] k2y_rcd_f;
assign k2y_rcd_dptr = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_DPTR_MSB:`FIRE_DLC_EPE_DPTR_LSB];
assign k2y_rcd_addr = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_ADDR_MSB:`FIRE_DLC_EPE_ADDR_LSB];
assign k2y_rcd_fdwbe = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_FDWBE_MSB:`FIRE_DLC_EPE_FDWBE_LSB];
assign k2y_rcd_ldwbe = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_LDWBE_MSB:`FIRE_DLC_EPE_LDWBE_LSB];
assign k2y_rcd_tag = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_TAG_MSB:`FIRE_DLC_EPE_TAG_LSB];
assign k2y_rcd_reqid = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_REQID_MSB:`FIRE_DLC_EPE_REQID_LSB];
assign k2y_rcd_len = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_LEN_MSB:`FIRE_DLC_EPE_LEN_LSB];
assign k2y_rcd_atr = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_ATR_MSB:`FIRE_DLC_EPE_ATR_LSB];
assign k2y_rcd_tc = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_TC_MSB:`FIRE_DLC_EPE_TC_LSB];
assign k2y_rcd_type = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_TYPE_MSB:`FIRE_DLC_EPE_TYPE_LSB];
assign k2y_rcd_f = `tiia_top.k2y_rcd[`FIRE_DLC_EPE_F_MSB:`FIRE_DLC_EPE_F_LSB];
EPIO_MRD32 = 7'b00_00000,
EPIO_MRD64 = 7'b01_00000,
EPIO_CFGRD0 = 7'b00_00100,
EPIO_CFGRD1 = 7'b00_00101,
EPIO_MWR32 = 7'b10_00000,
EPIO_MWR64 = 7'b11_00000,
EPIO_CFGWR0 = 7'b10_00100,
EPIO_CFGWR1 = 7'b10_00101,
EDMA_CPLLK = 7'b00_01011,
-var {k2y_rcd_f,k2y_rcd_type}
-val EPIO_MRD32 EPIO_MRD64 EPIO_IORD EPIO_CFGRD0 EPIO_CFGRD1 EPIO_MWR32 EPIO_MWR64
EPIO_IOWR EPIO_CFGWR0 EPIO_CFGWR1 EDMA_CPL EDMA_CPLLK EDMA_CPLD
-active `tiia_top.k2y_rcd_enq
-active ( `tiia_top.k2y_rcd_enq &
( ( k2y_rcd_type == 5'h00 ) |
( k2y_rcd_type == 5'h02 ) |
( k2y_rcd_type == 5'h04 ) |
( k2y_rcd_type == 5'h05 ) ) )
-clock `tiia_clk -reset `tiia_rst */
-active ( `tiia_top.k2y_rcd_enq &
( ( k2y_rcd_type == 5'h00 ) |
( k2y_rcd_type == 5'h02 ) |
( k2y_rcd_type == 5'h04 ) |
( k2y_rcd_type == 5'h05 ) ) )
-clock `tiia_clk -reset `tiia_rst */
-active ( `tiia_top.k2y_rcd_enq &
( ( k2y_rcd_type == 5'h02 ) |
( k2y_rcd_type == 5'h04 ) |
( k2y_rcd_type == 5'h05 ) ) )
-clock `tiia_clk -reset `tiia_rst */
-active ( `tiia_top.k2y_rcd_enq &
( ( {k2y_rcd_f,k2y_rcd_type} == EDMA_CPL ) |
( {k2y_rcd_f,k2y_rcd_type} == EDMA_CPLLK ) ) )
-clock `tiia_clk -reset `tiia_rst */
-active `tiia_top.k2y_rcd_enq
-active ( `tiia_top.k2y_rcd_enq &
( ( k2y_rcd_type == 5'h02 ) |
( k2y_rcd_type == 5'h04 ) |
( k2y_rcd_type == 5'h05 ) ) )
endmodule // tiia_checkers
projects / OpenSPARC-T2-DV / blob