verif/env/fc/vera/include/cpxorder_ports_binds.vrh

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: cpxorder_ports_binds.vrh
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
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// ========== Copyright Header End ============================================
#ifndef INC__CPXORDER_PORTS_BINDS_VRH
#define INC__CPXORDER_PORTS_BINDS_VRH

#include "cpxorder.if.vrh"

port cpxport {
    cpx_spc_data_cx2;
    dir_a;
}

port l2port {
    sctag_cpx_req_cq;
    sctag_cpx_atom_cq;
    cpx_sctag_grant_cx;
    sctag_cpx_data_ca;
}


// 8 Cores

bind cpxport cpxbind_0 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_0;
    dir_a                cpxorder.dir_a_0;
}

bind cpxport cpxbind_1 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_1;
    dir_a                cpxorder.dir_a_1;
}

bind cpxport cpxbind_2 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_2;
    dir_a                cpxorder.dir_a_2;
}

bind cpxport cpxbind_3 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_3;
    dir_a                cpxorder.dir_a_3;
}

bind cpxport cpxbind_4 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_4;
    dir_a                cpxorder.dir_a_4;
}

bind cpxport cpxbind_5 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_5;
    dir_a                cpxorder.dir_a_5;
}

bind cpxport cpxbind_6 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_6;
    dir_a                cpxorder.dir_a_6;
}

bind cpxport cpxbind_7 {
    cpx_spc_data_cx2     cpxorder.cpx_spc_data_cx2_7;
    dir_a                cpxorder.dir_a_7;
}


// 8 L2 Banks + MCU + NCU

bind l2port l2bind_0 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_0;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_0;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_0;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_0;
}

bind l2port l2bind_1 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_1;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_1;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_1;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_1;
}

bind l2port l2bind_2 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_2;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_2;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_2;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_2;
}

bind l2port l2bind_3 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_3;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_3;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_3;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_3;
}

bind l2port l2bind_4 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_4;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_4;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_4;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_4;
}

bind l2port l2bind_5 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_5;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_5;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_5;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_5;
}

bind l2port l2bind_6 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_6;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_6;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_6;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_6;
}

bind l2port l2bind_7 {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_7;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_7;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_7;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_7;
}

bind l2port iobind {
    sctag_cpx_req_cq     cpxorder.sctag_cpx_req_cq_8;
    sctag_cpx_atom_cq    cpxorder.sctag_cpx_atom_cq_8;
    cpx_sctag_grant_cx   cpxorder.cpx_sctag_grant_cx_8;
    sctag_cpx_data_ca    cpxorder.sctag_cpx_data_ca_8;
}

#endif