verif/env/fnx/vlib/FNXPCIEXactor/sim/denali_pcie_device.v

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// OpenSPARC T2 Processor File: denali_pcie_device.v
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`timescale 10fs/10fs

module denali_pcie_device (
    TX,
    TX_,
    RX,
    RX_,
    CLK_TX,
    CLK_RX,
    PERST_
);
   // the DV_ROOT gets replaced by GNUmakefile
  parameter  interface_soma = "$DV_ROOT/verif/env/fnx/vlib/FNXPCIEXactor/sim/soma_default.spc";
  parameter  init_file      = "";

  output [7:0] TX;
  reg    [7:0] den_TX;
  assign TX = den_TX;

  output [7:0] TX_;
  reg  [7:0] den_TX_;
  assign TX_ = den_TX_;

  input [7:0] RX;
  input [7:0] RX_;

  inout CLK_TX;
  inout CLK_RX;

  reg den_CLK_TX;
  reg den_CLK_RX;

  assign CLK_TX = den_CLK_TX;
  assign CLK_RX = den_CLK_RX;

  input PERST_;

initial begin
   $pcie_access();
end

endmodule

`timescale 1ps/1ps