// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: vega_memory_map.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// This program is free software; you can redistribute it and/or modify
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// ========== Copyright Header End ============================================
#define ADDRESS_RANGE_MASK 32'h01FF_0000
/* MAC BLOCK: 0x0C_0000 - 0x0C_FFFF */
#define MAC_ADDRESS_RANGE 32'h001C_0000
#define MIF_ADDRESS_RANGE 32'h0103_0000
#define PCS_ADDRESS_RANGE 32'h0104_0000
hrp - 0x00_0000 - 0x00_0400
htp - 0x00_0000 - 0x00_0800
ht_int - 0x00_0000 - 0x00_0c00 */
#define HT_ADDRESS_RANGE 32'h0000_0000
#define HRP_ADDRESS_RANGE 32'h0000_0400
#define HTP_ADDRESS_RANGE 32'h0000_0800
/* NTX BLOCK: 0x02_0000 - 0x02_FFFF */
#define OPP_ADDRESS_RANGE 32'h0002_0000
/* NRX BLOCK: 0x01_0000 - 0x01_FFFF */
#define NRX_ADDRESS_RANGE 32'h0008_0000
#define IBTP_ADDRESS_RANGE 32'h0001_0000
#define LLTX_ADDRESS_RANGE 32'h0001_0000
#define BMC_ADDRESS_RANGE 32'h0001_0000
/* IRX BLOCK : 0x04_0000 - 0x07_FFFF */
#define IBRP_ADDRESS_RANGE 32'h0004_0000
ffl - 0x10_0000 - 0x1F_FFFF */
#define FFL_ADDRESS_RANGE 32'h0010_0000
/* ILC BLOCK: 0x03_0000 - 0x03_FFFF */
#define ILC_ADDRESS_RANGE 32'h0003_0000
#define IBSE_ADDRESS_RANGE 32'h0101_0000
/* ITX BLOCK: 0x08_0000 - 0x0B_FFFF */
#define ITX_ADDRESS_RANGE 32'h0008_0000
/* Many address ranges are subdivided by port.
For each port, there is an identical memory
map. To determine the port subdivision, the
original address is masked with PORT_RANGE_MASK.
A compare-to register is initialized to zero.
This compare-to register is compared to the
result of masking the original address - a
compare indicates port 0. The compare_to
register is incremented by PORT_OFFSET
to check for port 1. This process is repeated
When using memory references associated with
a particular port, add the offset of the port
number to the base address:
(XXX_STATUS_REG + port_num*PORT_OFFSET)
The port range values are used by the pio fake
module and the shadow space module.
#define PORT_RANGE_MASK 32'h0000_F000
#define PORT_OFFSET 32'h0000_1000
#define PORT_0_RANGE 32'h0000_0000
#define XPCS_0_RANGE (32'h0000_1000 << 1)
#define PCS_0_RANGE 32'h0000_2000
#define PORT_1_RANGE 32'h0000_3000
#define XPCS_1_RANGE 32'h0000_4000
#define PCS_1_RANGE 32'h0000_5000
#define PORT_2_RANGE 32'h0000_6000
#define PCS_2_RANGE 32'h0000_7000
#define PORT_3_RANGE 32'h0000_8000
#define PCS_3_RANGE 32'h0000_9000
#define ESER_RANGE 32'h0000_a000
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