// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: tcu.bind.vri
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// ========== Copyright Header End ============================================
#include <tcu_top_defines.vri>
bind TCU_clk_port tcu_clk_bind {
l2clk tcu_l2clk_if.l2clk;
iol2clk tcu_iol2clk_if.l2clk;
// bind tap__port tap_bind {
// test_mode jtag.TEST_MODE;
bind bscan__port bscan_bind {
scan_en bscan.bs_scan_en;
bind mbist__port mbist_bind {
mbist_user mbist.mbist_user;
mbist.tcu_rdp_rdmc_mbist_start,
mbist.tcu_rtx_rxc_ipp0_mbist_start,
mbist.tcu_rtx_rxc_ipp1_mbist_start,
mbist.tcu_rtx_rxc_mb5_mbist_start,
mbist.tcu_rtx_rxc_mb6_mbist_start,
mbist.tcu_rtx_rxc_zcp0_mbist_start,
mbist.tcu_rtx_rxc_zcp1_mbist_start,
mbist.tcu_rtx_txc_txe0_mbist_start,
mbist.tcu_rtx_txc_txe1_mbist_start,
mbist.tcu_tds_smx_mbist_start,
mbist.tcu_tds_tdmc_mbist_start,
mbist.tcu_peu_mbist_start,
mbist.tcu_dmu_mbist_start,
mbist.tcu_l2t7_mbist_start,
mbist.tcu_l2t6_mbist_start,
mbist.tcu_l2t5_mbist_start,
mbist.tcu_l2t4_mbist_start,
mbist.tcu_l2t3_mbist_start,
mbist.tcu_l2t2_mbist_start,
mbist.tcu_l2t1_mbist_start,
mbist.tcu_l2t0_mbist_start,
mbist.tcu_l2b7_mbist_start,
mbist.tcu_l2b6_mbist_start,
mbist.tcu_l2b5_mbist_start,
mbist.tcu_l2b4_mbist_start,
mbist.tcu_l2b3_mbist_start,
mbist.tcu_l2b2_mbist_start,
mbist.tcu_l2b1_mbist_start,
mbist.tcu_l2b0_mbist_start,
mbist.tcu_mcu3_mbist_start,
mbist.tcu_mcu2_mbist_start,
mbist.tcu_mcu1_mbist_start,
mbist.tcu_mcu0_mbist_start,
mbist.tcu_ncu_mbist_start,
mbist.tcu_sio_mbist_start,
mbist.tcu_sii_mbist_start,
mbist.tcu_spc_mbist_start
mbist.rdp_rdmc_tcu_mbist_done
, mbist.rtx_rxc_ipp0_tcu_mbist_done
, mbist.rtx_rxc_ipp1_tcu_mbist_done
, mbist.rtx_rxc_mb5_tcu_mbist_done
, mbist.rtx_rxc_mb6_tcu_mbist_done
, mbist.rtx_rxc_zcp0_tcu_mbist_done
, mbist.rtx_rxc_zcp1_tcu_mbist_done
, mbist.rtx_txc_txe0_tcu_mbist_done
, mbist.rtx_txc_txe1_tcu_mbist_done
, mbist.tds_smx_tcu_mbist_done
, mbist.tds_tdmc_tcu_mbist_done
, mbist.peu_tcu_mbist_done
, mbist.dmu_tcu_mbist_done
, mbist.l2t7_tcu_mbist_done
, mbist.l2t6_tcu_mbist_done
, mbist.l2t5_tcu_mbist_done
, mbist.l2t4_tcu_mbist_done
, mbist.l2t3_tcu_mbist_done
, mbist.l2t2_tcu_mbist_done
, mbist.l2t1_tcu_mbist_done
, mbist.l2t0_tcu_mbist_done
, mbist.l2b7_tcu_mbist_done
, mbist.l2b6_tcu_mbist_done
, mbist.l2b5_tcu_mbist_done
, mbist.l2b4_tcu_mbist_done
, mbist.l2b3_tcu_mbist_done
, mbist.l2b2_tcu_mbist_done
, mbist.l2b1_tcu_mbist_done
, mbist.l2b0_tcu_mbist_done
, mbist.mcu3_tcu_mbist_done
, mbist.mcu2_tcu_mbist_done
, mbist.mcu1_tcu_mbist_done
, mbist.mcu0_tcu_mbist_done
, mbist.ncu_tcu_mbist_done
, mbist.sio_tcu_mbist_done
, mbist.sii_tcu_mbist_done
, mbist.spc7_tcu_mbist_done
, mbist.spc6_tcu_mbist_done
, mbist.spc5_tcu_mbist_done
, mbist.spc4_tcu_mbist_done
, mbist.spc3_tcu_mbist_done
, mbist.spc2_tcu_mbist_done
, mbist.spc1_tcu_mbist_done
, mbist.spc0_tcu_mbist_done
mbist.rdp_rdmc_tcu_mbist_fail
, mbist.rtx_rxc_ipp0_tcu_mbist_fail
, mbist.rtx_rxc_ipp1_tcu_mbist_fail
, mbist.rtx_rxc_mb5_tcu_mbist_fail
, mbist.rtx_rxc_mb6_tcu_mbist_fail
, mbist.rtx_rxc_zcp0_tcu_mbist_fail
, mbist.rtx_rxc_zcp1_tcu_mbist_fail
, mbist.rtx_txc_txe0_tcu_mbist_fail
, mbist.rtx_txc_txe1_tcu_mbist_fail
, mbist.tds_smx_tcu_mbist_fail
, mbist.tds_tdmc_tcu_mbist_fail
, mbist.peu_tcu_mbist_fail
, mbist.dmu_tcu_mbist_fail
, mbist.l2t7_tcu_mbist_fail
, mbist.l2t6_tcu_mbist_fail
, mbist.l2t5_tcu_mbist_fail
, mbist.l2t4_tcu_mbist_fail
, mbist.l2t3_tcu_mbist_fail
, mbist.l2t2_tcu_mbist_fail
, mbist.l2t1_tcu_mbist_fail
, mbist.l2t0_tcu_mbist_fail
, mbist.l2b7_tcu_mbist_fail
, mbist.l2b6_tcu_mbist_fail
, mbist.l2b5_tcu_mbist_fail
, mbist.l2b4_tcu_mbist_fail
, mbist.l2b3_tcu_mbist_fail
, mbist.l2b2_tcu_mbist_fail
, mbist.l2b1_tcu_mbist_fail
, mbist.l2b0_tcu_mbist_fail
, mbist.mcu3_tcu_mbist_fail
, mbist.mcu2_tcu_mbist_fail
, mbist.mcu1_tcu_mbist_fail
, mbist.mcu0_tcu_mbist_fail
, mbist.ncu_tcu_mbist_fail
, mbist.sio_tcu_mbist_fail
, mbist.sii_tcu_mbist_fail
, mbist.spc7_tcu_mbist_fail
, mbist.spc6_tcu_mbist_fail
, mbist.spc5_tcu_mbist_fail
, mbist.spc4_tcu_mbist_fail
, mbist.spc3_tcu_mbist_fail
, mbist.spc2_tcu_mbist_fail
, mbist.spc1_tcu_mbist_fail
, mbist.spc0_tcu_mbist_fail
, mbist.tcu_spc6_clk_stop
, mbist.tcu_spc5_clk_stop
, mbist.tcu_spc4_clk_stop
, mbist.tcu_spc3_clk_stop
, mbist.tcu_spc2_clk_stop
, mbist.tcu_spc1_clk_stop
, mbist.tcu_spc0_clk_stop
mbist.spc7_tcu_mbist_scan_in
, mbist.spc6_tcu_mbist_scan_in
, mbist.spc5_tcu_mbist_scan_in
, mbist.spc4_tcu_mbist_scan_in
, mbist.spc3_tcu_mbist_scan_in
, mbist.spc2_tcu_mbist_scan_in
, mbist.spc1_tcu_mbist_scan_in
, mbist.spc0_tcu_mbist_scan_in
mbist.tcu_spc7_mbist_scan_out
, mbist.tcu_spc6_mbist_scan_out
, mbist.tcu_spc5_mbist_scan_out
, mbist.tcu_spc4_mbist_scan_out
, mbist.tcu_spc3_mbist_scan_out
, mbist.tcu_spc2_mbist_scan_out
, mbist.tcu_spc1_mbist_scan_out
, mbist.tcu_spc0_mbist_scan_out
mbist.rdp_rdmc_mbist_scan_out
, mbist.rtx_mbist_scan_out
, mbist.tds_mbist_scan_out
, mbist.peu_tcu_mbist_scan_out
, mbist.dmu_tcu_mbist_scan_out
, mbist.l2t7_tcu_mbist_scan_out
, mbist.l2t6_tcu_mbist_scan_out
, mbist.l2t5_tcu_mbist_scan_out
, mbist.l2t4_tcu_mbist_scan_out
, mbist.l2t3_tcu_mbist_scan_out
, mbist.l2t2_tcu_mbist_scan_out
, mbist.l2t1_tcu_mbist_scan_out
, mbist.l2t0_tcu_mbist_scan_out
, mbist.l2b7_tcu_mbist_scan_out
, mbist.l2b6_tcu_mbist_scan_out
, mbist.l2b5_tcu_mbist_scan_out
, mbist.l2b4_tcu_mbist_scan_out
, mbist.l2b3_tcu_mbist_scan_out
, mbist.l2b2_tcu_mbist_scan_out
, mbist.l2b1_tcu_mbist_scan_out
, mbist.l2b0_tcu_mbist_scan_out
, mbist.mcu3_tcu_mbist_scan_out
, mbist.mcu2_tcu_mbist_scan_out
, mbist.mcu1_tcu_mbist_scan_out
, mbist.mcu0_tcu_mbist_scan_out
, mbist.ncu_tcu_mbist_scan_out
, mbist.sio_tcu_mbist_scan_out
, mbist.sii_tcu_mbist_scan_out
mbist.rdp_rdmc_mbist_scan_in
, mbist.rtx_mbist_scan_in
, mbist.tds_mbist_scan_in
, mbist.tcu_peu_mbist_scan_in
, mbist.tcu_dmu_mbist_scan_in
, mbist.tcu_l2t7_mbist_scan_in
, mbist.tcu_l2t6_mbist_scan_in
, mbist.tcu_l2t5_mbist_scan_in
, mbist.tcu_l2t4_mbist_scan_in
, mbist.tcu_l2t3_mbist_scan_in
, mbist.tcu_l2t2_mbist_scan_in
, mbist.tcu_l2t1_mbist_scan_in
, mbist.tcu_l2t0_mbist_scan_in
, mbist.tcu_l2b7_mbist_scan_in
, mbist.tcu_l2b6_mbist_scan_in
, mbist.tcu_l2b5_mbist_scan_in
, mbist.tcu_l2b4_mbist_scan_in
, mbist.tcu_l2b3_mbist_scan_in
, mbist.tcu_l2b2_mbist_scan_in
, mbist.tcu_l2b1_mbist_scan_in
, mbist.tcu_l2b0_mbist_scan_in
, mbist.tcu_mcu3_mbist_scan_in
, mbist.tcu_mcu2_mbist_scan_in
, mbist.tcu_mcu1_mbist_scan_in
, mbist.tcu_mcu0_mbist_scan_in
, mbist.tcu_ncu_mbist_scan_in
, mbist.tcu_sio_mbist_scan_in
, mbist.tcu_sii_mbist_scan_in
mbist.tcu_rdp_io_clk_stop
, mbist.tcu_rtx_io_clk_stop
, mbist.tcu_tds_io_clk_stop
tcu_dmu_io_clk_stop mbist.tcu_dmu_io_clk_stop;
tcu_peu_io_clk_stop mbist.tcu_peu_io_clk_stop;
tcu_l2t7_clk_stop mbist.tcu_l2t7_clk_stop;
tcu_l2t6_clk_stop mbist.tcu_l2t6_clk_stop;
tcu_l2t5_clk_stop mbist.tcu_l2t5_clk_stop;
tcu_l2t4_clk_stop mbist.tcu_l2t4_clk_stop;
tcu_l2t3_clk_stop mbist.tcu_l2t3_clk_stop;
tcu_l2t2_clk_stop mbist.tcu_l2t2_clk_stop;
tcu_l2t1_clk_stop mbist.tcu_l2t1_clk_stop;
tcu_l2t0_clk_stop mbist.tcu_l2t0_clk_stop;
tcu_l2b7_clk_stop mbist.tcu_l2b7_clk_stop;
tcu_l2b6_clk_stop mbist.tcu_l2b6_clk_stop;
tcu_l2b5_clk_stop mbist.tcu_l2b5_clk_stop;
tcu_l2b4_clk_stop mbist.tcu_l2b4_clk_stop;
tcu_l2b3_clk_stop mbist.tcu_l2b3_clk_stop;
tcu_l2b2_clk_stop mbist.tcu_l2b2_clk_stop;
tcu_l2b1_clk_stop mbist.tcu_l2b1_clk_stop;
tcu_l2b0_clk_stop mbist.tcu_l2b0_clk_stop;
tcu_mcu3_clk_stop mbist.tcu_mcu3_clk_stop;
tcu_mcu2_clk_stop mbist.tcu_mcu2_clk_stop;
tcu_mcu1_clk_stop mbist.tcu_mcu1_clk_stop;
tcu_mcu0_clk_stop mbist.tcu_mcu0_clk_stop;
tcu_peu_pc_clk_stop mbist.tcu_peu_pc_clk_stop;
tcu_mcu0_dr_clk_stop mbist.tcu_mcu0_dr_clk_stop;
tcu_mcu0_io_clk_stop mbist.tcu_mcu0_io_clk_stop;
tcu_mcu0_fbd_clk_stop mbist.tcu_mcu0_fbd_clk_stop;
tcu_mcu1_dr_clk_stop mbist.tcu_mcu1_dr_clk_stop;
tcu_mcu1_io_clk_stop mbist.tcu_mcu1_io_clk_stop;
tcu_mcu1_fbd_clk_stop mbist.tcu_mcu1_fbd_clk_stop;
tcu_mcu2_dr_clk_stop mbist.tcu_mcu2_dr_clk_stop;
tcu_mcu2_io_clk_stop mbist.tcu_mcu2_io_clk_stop;
tcu_mcu2_fbd_clk_stop mbist.tcu_mcu2_fbd_clk_stop;
tcu_mcu3_dr_clk_stop mbist.tcu_mcu3_dr_clk_stop;
tcu_mcu3_io_clk_stop mbist.tcu_mcu3_io_clk_stop;
tcu_mcu3_fbd_clk_stop mbist.tcu_mcu3_fbd_clk_stop;
tcu_ncu_io_clk_stop mbist.tcu_ncu_io_clk_stop;
tcu_sio_io_clk_stop mbist.tcu_sio_io_clk_stop;
tcu_sii_io_clk_stop mbist.tcu_sii_io_clk_stop;
tcu_soc_aclk mbist.tcu_aclk;
tcu_soc_bclk mbist.tcu_bclk;
tcu_soc_scan_en mbist.tcu_scan_en;
tcu_spc_mbist_start mbist.tcu_spc_mbist_start;
tcu_mbist_bisi_en mbist.tcu_mbist_bisi_en;
tcu_mio_mbist_fail mbist.tcu_mio_mbist_fail;
tcu_mio_mbist_done mbist.tcu_mio_mbist_done;
pin_mbist_fail mbist.DBG_DQ[0];
pin_mbist_done mbist.DBG_DQ[1];
mbist_l2tag_read_l2t0 mbist.mbist_l2tag_read_l2t0;
bisx_counter mbist.bisx_counter;
bind lbist__port lbist_bind {
lbist_start lbist.lbist_start;
lbist_scan_in lbist.lbist_scan_in;
lbist_pgm lbist.lbist_pgm;
test_mode lbist.test_mode;
lbist.spc7_tcu_lbist_done
, lbist.spc6_tcu_lbist_done
, lbist.spc5_tcu_lbist_done
, lbist.spc4_tcu_lbist_done
, lbist.spc3_tcu_lbist_done
, lbist.spc2_tcu_lbist_done
, lbist.spc1_tcu_lbist_done
, lbist.spc0_tcu_lbist_done
lbist.spc7_tcu_lbist_scan_out
, lbist.spc6_tcu_lbist_scan_out
, lbist.spc5_tcu_lbist_scan_out
, lbist.spc4_tcu_lbist_scan_out
, lbist.spc3_tcu_lbist_scan_out
, lbist.spc2_tcu_lbist_scan_out
, lbist.spc1_tcu_lbist_scan_out
, lbist.spc0_tcu_lbist_scan_out
bind scan__port scan_bind {
ac_test_mode void; // scan.AC_TEST_MODE; // moved it to pkg.*.vri
//srdes_scancfg scan.SRDES_SCANCFG;
//tcu_srdes_scancfg scan.tcu_srdes_scancfg;
//tcu_pllbypass scan.tcu_pllbypass;
scan_en void; // scan.SCAN_EN; // moved it to pkg.*.vri
tcu_scan_en scan.tcu_scan_en;
tcu_se_scancollar_in scan.tcu_se_scancollar_in;
tcu_se_scancollar_out scan.tcu_se_scancollar_out;
tcu_array_wr_inhibit scan.tcu_array_wr_inhibit;
tcu_array_bypass scan.tcu_array_bypass;
tcu_dectest scan.tcu_dectest;
tcu_muxtest scan.tcu_muxtest;
pscan_si void; // scan.SCAN_IN; // moved it to pkg.*.vri
, scan.spc7_tcu_scan_in[1]
, scan.spc7_tcu_scan_in[0]
, scan.spc6_tcu_scan_in[1]
, scan.spc6_tcu_scan_in[0]
, scan.spc5_tcu_scan_in[1]
, scan.spc5_tcu_scan_in[0]
, scan.spc4_tcu_scan_in[1]
, scan.spc4_tcu_scan_in[0]
, scan.spc3_tcu_scan_in[1]
, scan.spc3_tcu_scan_in[0]
, scan.spc2_tcu_scan_in[1]
, scan.spc2_tcu_scan_in[0]
, scan.spc1_tcu_scan_in[1]
, scan.spc1_tcu_scan_in[0]
, scan.spc0_tcu_scan_in[1]
, scan.spc0_tcu_scan_in[0]
//scan.tcu_srdes_scan_out
,scan.tcu_spc7_scan_out[1]
,scan.tcu_spc7_scan_out[0]
,scan.tcu_spc6_scan_out[1]
,scan.tcu_spc6_scan_out[0]
,scan.tcu_spc5_scan_out[1]
,scan.tcu_spc5_scan_out[0]
,scan.tcu_spc4_scan_out[1]
,scan.tcu_spc4_scan_out[0]
,scan.tcu_spc3_scan_out[1]
,scan.tcu_spc3_scan_out[0]
,scan.tcu_spc2_scan_out[1]
,scan.tcu_spc2_scan_out[0]
,scan.tcu_spc1_scan_out[1]
,scan.tcu_spc1_scan_out[0]
,scan.tcu_spc0_scan_out[1]
,scan.tcu_spc0_scan_out[1]
bind efuse__port efuse_bind {
efuse_rowaddr efuse.tcu_efu_rowaddr;
efuse_coladdr efuse.tcu_efu_coladdr;
efuse_read_en efuse.tcu_efu_read_en;
efuse_read_mode efuse.tcu_efu_read_mode;
efuse_read_start efuse.tcu_efu_read_start;
efuse_fuse_bypass efuse.tcu_efu_fuse_bypass;
efuse_dest_sample efuse.tcu_efu_dest_sample;
efuse_updatedr efuse.tcu_efu_updatedr;
efuse_shiftdr efuse.tcu_efu_shiftdr;
efuse_capturedr efuse.tcu_efu_capturedr;
efuse_sbc_efa_bit_addr efuse.sbc_efa_bit_addr;
efuse_sbc_efa_word_addr efuse.sbc_efa_word_addr;
efuse_sbc_efa_margin0_rd efuse.sbc_efa_margin0_rd;
efuse_sbc_efa_margin1_rd efuse.sbc_efa_margin1_rd;
efuse_sbc_efa_power_down efuse.sbc_efa_power_down;
efuse_pwr_ok efuse.pwr_ok;
efuse_pi_efa_prog_en efuse.pi_efa_prog_en;
efuse_efuse_row efuse.efuse_row;
efuse_sbc_efa_read_en efuse.sbc_efa_read_en;
efuse_efa_read_data efuse.efa_read_data;
efuse_efa_out_data efuse.efa_out_data;
efuse_read_data_ff efuse.read_data_ff;
efuse_tck_shft_data_ff efuse.tck_shft_data_ff;
efuse_io_vpp efuse.io_vpp;
efuse_io_pgrm_en efuse.io_pgrm_en;
efu_ncu_coreavl_xfer_en efuse.efu_ncu_coreavl_xfer_en;
efu_ncu_bankavl_xfer_en efuse.efu_ncu_bankavl_xfer_en;
efu_l2b1_fuse_xfer_en efuse.efu_l2b1_fuse_xfer_en;
efu_l2t1_fuse_xfer_en efuse.efu_l2t1_fuse_xfer_en;
efu_ncu_srlnum1_xfer_en efuse.efu_ncu_srlnum1_xfer_en;
efu_niu_4k_xfer_en efuse.efu_niu_4k_xfer_en;
efu_spc1_fuse_dxfer_en efuse.efu_spc1_fuse_dxfer_en;
efu_spc1_fuse_ixfer_en efuse.efu_spc1_fuse_ixfer_en;
efu_dmu_xfer_en efuse.efu_dmu_xfer_en;
, efuse.efu_niu_ram_xfer_en
, efuse.efu_niu_4k_xfer_en
, efuse.efu_niu_ram1_xfer_en
, efuse.efu_niu_ram0_xfer_en
, efuse.efu_niu_cfifo1_xfer_en
, efuse.efu_niu_cfifo0_xfer_en
, efuse.efu_niu_ipp1_xfer_en
, efuse.efu_niu_ipp0_xfer_en
, efuse.efu_niu_mac0_ro_xfer_en
, efuse.efu_niu_mac0_sf_xfer_en
, efuse.efu_niu_mac1_ro_xfer_en
, efuse.efu_niu_mac1_sf_xfer_en
, efuse.efu_ncu_srlnum2_xfer_en
, efuse.efu_ncu_srlnum1_xfer_en
, efuse.efu_ncu_srlnum0_xfer_en
, efuse.efu_ncu_bankavl_xfer_en
, efuse.efu_ncu_coreavl_xfer_en
, efuse.efu_l2d7_fuse_xfer_en
, efuse.efu_l2d6_fuse_xfer_en
, efuse.efu_l2d5_fuse_xfer_en
, efuse.efu_l2d4_fuse_xfer_en
, efuse.efu_l2d3_fuse_xfer_en
, efuse.efu_l2d2_fuse_xfer_en
, efuse.efu_l2d1_fuse_xfer_en
, efuse.efu_l2d0_fuse_xfer_en
, efuse.efu_l2t7_fuse_xfer_en
, efuse.efu_l2t6_fuse_xfer_en
, efuse.efu_l2t5_fuse_xfer_en
, efuse.efu_l2t4_fuse_xfer_en
, efuse.efu_l2t3_fuse_xfer_en
, efuse.efu_l2t2_fuse_xfer_en
, efuse.efu_l2t1_fuse_xfer_en
, efuse.efu_l2t0_fuse_xfer_en
, efuse.efu_spc7_fuse_dxfer_en
, efuse.efu_spc7_fuse_ixfer_en
, efuse.efu_spc6_fuse_dxfer_en
, efuse.efu_spc6_fuse_ixfer_en
, efuse.efu_spc5_fuse_dxfer_en
, efuse.efu_spc5_fuse_ixfer_en
, efuse.efu_spc4_fuse_dxfer_en
, efuse.efu_spc4_fuse_ixfer_en
, efuse.efu_spc3_fuse_dxfer_en
, efuse.efu_spc3_fuse_ixfer_en
, efuse.efu_spc2_fuse_dxfer_en
, efuse.efu_spc2_fuse_ixfer_en
, efuse.efu_spc1_fuse_dxfer_en
, efuse.efu_spc1_fuse_ixfer_en
, efuse.efu_spc0_fuse_dxfer_en
, efuse.efu_spc0_fuse_ixfer_en
, efuse.niu_efu_ram_xfer_en
, efuse.niu_efu_4k_xfer_en
, efuse.niu_efu_ram1_xfer_en
, efuse.niu_efu_ram0_xfer_en
, efuse.niu_efu_cfifo1_xfer_en
, efuse.niu_efu_cfifo0_xfer_en
, efuse.niu_efu_ipp1_xfer_en
, efuse.niu_efu_ipp0_xfer_en
, efuse.niu_efu_mac0_ro_xfer_en
, efuse.niu_efu_mac0_sf_xfer_en
, efuse.niu_efu_mac1_ro_xfer_en
, efuse.niu_efu_mac1_sf_xfer_en
, efuse.l2d7_efu_fuse_xfer_en
, efuse.l2d6_efu_fuse_xfer_en
, efuse.l2d5_efu_fuse_xfer_en
, efuse.l2d4_efu_fuse_xfer_en
, efuse.l2d3_efu_fuse_xfer_en
, efuse.l2d2_efu_fuse_xfer_en
, efuse.l2d1_efu_fuse_xfer_en
, efuse.l2d0_efu_fuse_xfer_en
, efuse.l2t7_efu_fuse_xfer_en
, efuse.l2t6_efu_fuse_xfer_en
, efuse.l2t5_efu_fuse_xfer_en
, efuse.l2t4_efu_fuse_xfer_en
, efuse.l2t3_efu_fuse_xfer_en
, efuse.l2t2_efu_fuse_xfer_en
, efuse.l2t1_efu_fuse_xfer_en
, efuse.l2t0_efu_fuse_xfer_en
, efuse.spc7_efu_fuse_dxfer_en
, efuse.spc7_efu_fuse_ixfer_en
, efuse.spc6_efu_fuse_dxfer_en
, efuse.spc6_efu_fuse_ixfer_en
, efuse.spc5_efu_fuse_dxfer_en
, efuse.spc5_efu_fuse_ixfer_en
, efuse.spc4_efu_fuse_dxfer_en
, efuse.spc4_efu_fuse_ixfer_en
, efuse.spc3_efu_fuse_dxfer_en
, efuse.spc3_efu_fuse_ixfer_en
, efuse.spc2_efu_fuse_dxfer_en
, efuse.spc2_efu_fuse_ixfer_en
, efuse.spc1_efu_fuse_dxfer_en
, efuse.spc1_efu_fuse_ixfer_en
, efuse.spc0_efu_fuse_dxfer_en
, efuse.spc0_efu_fuse_ixfer_en
efuse_gclk_if.efu_niu_fclrz
, efuse_gclk_if.efu_psr_fclrz
, efuse_gclk_if.efu_mcu_fclrz
, efuse_gclk_if.efu_dmu_clr
, efuse_gclk_if.efu_niu_ipp0_clr
, efuse_gclk_if.efu_niu_ipp1_clr
, efuse_gclk_if.efu_niu_mac0_ro_clr
, efuse_gclk_if.efu_niu_mac0_sf_clr
, efuse_gclk_if.efu_niu_mac1_ro_clr
, efuse_gclk_if.efu_niu_mac1_sf_clr
, efuse_gclk_if.efu_niu_cfifo0_clr
, efuse_gclk_if.efu_niu_cfifo1_clr
, efuse_gclk_if.efu_niu_ram1_clr
, efuse_gclk_if.efu_niu_ram0_clr
, efuse_gclk_if.efu_niu_ram_clr
, efuse_gclk_if.efu_niu_4k_clr
, efuse_gclk_if.efu_l2b7_fuse_clr
, efuse_gclk_if.efu_l2b6_fuse_clr
, efuse_gclk_if.efu_l2b5_fuse_clr
, efuse_gclk_if.efu_l2b4_fuse_clr
, efuse_gclk_if.efu_l2b3_fuse_clr
, efuse_gclk_if.efu_l2b2_fuse_clr
, efuse_gclk_if.efu_l2b1_fuse_clr
, efuse_gclk_if.efu_l2b0_fuse_clr
, efuse_gclk_if.efu_l2t7_fuse_clr
, efuse_gclk_if.efu_l2t6_fuse_clr
, efuse_gclk_if.efu_l2t5_fuse_clr
, efuse_gclk_if.efu_l2t4_fuse_clr
, efuse_gclk_if.efu_l2t3_fuse_clr
, efuse_gclk_if.efu_l2t2_fuse_clr
, efuse_gclk_if.efu_l2t1_fuse_clr
, efuse_gclk_if.efu_l2t0_fuse_clr
, efuse_gclk_if.efu_spc7_fuse_dclr
, efuse_gclk_if.efu_spc7_fuse_iclr
, efuse_gclk_if.efu_spc6_fuse_dclr
, efuse_gclk_if.efu_spc6_fuse_iclr
, efuse_gclk_if.efu_spc5_fuse_dclr
, efuse_gclk_if.efu_spc5_fuse_iclr
, efuse_gclk_if.efu_spc4_fuse_dclr
, efuse_gclk_if.efu_spc4_fuse_iclr
, efuse_gclk_if.efu_spc3_fuse_dclr
, efuse_gclk_if.efu_spc3_fuse_iclr
, efuse_gclk_if.efu_spc2_fuse_dclr
, efuse_gclk_if.efu_spc2_fuse_iclr
, efuse_gclk_if.efu_spc1_fuse_dclr
, efuse_gclk_if.efu_spc1_fuse_iclr
, efuse_gclk_if.efu_spc0_fuse_dclr
, efuse_gclk_if.efu_spc0_fuse_iclr
coreavail efuse.coreavail;
bankavail efuse.bankavail;
fusestat efuse.creg_fusestat;
efcnt_dout efuse.efcnt_dout;
efu_done_int efuse.efu_done_int;
bind cmp__port cmp_bind {
tb_fusedata_init cmp_spc.tb_fusedata_init;
,cmp_spc.core_available_6
,cmp_spc.core_available_5
,cmp_spc.core_available_4
,cmp_spc.core_available_3
,cmp_spc.core_available_2
,cmp_spc.core_available_1
,cmp_spc.core_available_0
cmp_spc.core_enable_status_7
,cmp_spc.core_enable_status_6
,cmp_spc.core_enable_status_5
,cmp_spc.core_enable_status_4
,cmp_spc.core_enable_status_3
,cmp_spc.core_enable_status_2
,cmp_spc.core_enable_status_1
,cmp_spc.core_enable_status_0
core_running_status_array
cmp_spc.core_running_status_7
,cmp_spc.core_running_status_6
,cmp_spc.core_running_status_5
,cmp_spc.core_running_status_4
,cmp_spc.core_running_status_3
,cmp_spc.core_running_status_2
,cmp_spc.core_running_status_1
,cmp_spc.core_running_status_0
bind ncu_sck__port ncu_sck_bind {
bind spc_debug__port spc_debug_bind {
tcu_ss_mode spc_debug.tcu_ss_mode;
tcu_do_mode spc_debug.tcu_do_mode;
tcu_ss_request spc_debug.tcu_ss_request;
spc_debug.ncu_spc7_core_running,
spc_debug.ncu_spc6_core_running,
spc_debug.ncu_spc5_core_running,
spc_debug.ncu_spc4_core_running,
spc_debug.ncu_spc3_core_running,
spc_debug.ncu_spc2_core_running,
spc_debug.ncu_spc1_core_running,
spc_debug.ncu_spc0_core_running
spc_debug.spc7_ss_complete,
spc_debug.spc6_ss_complete,
spc_debug.spc5_ss_complete,
spc_debug.spc4_ss_complete,
spc_debug.spc3_ss_complete,
spc_debug.spc2_ss_complete,
spc_debug.spc1_ss_complete,
spc_debug.spc0_ss_complete
spc_debug.spc7_ncu_core_running_status,
spc_debug.spc6_ncu_core_running_status,
spc_debug.spc5_ncu_core_running_status,
spc_debug.spc4_ncu_core_running_status,
spc_debug.spc3_ncu_core_running_status,
spc_debug.spc2_ncu_core_running_status,
spc_debug.spc1_ncu_core_running_status,
spc_debug.spc0_ncu_core_running_status
bind tcu_siu__port tcu_siu_bind {
tcu_sii_data tcu_siu.tcu_sii_data;
tcu_sii_vld tcu_siu.tcu_sii_vld;
sio_tcu_data tcu_siu.sio_tcu_data;
sio_tcu_vld tcu_siu.sio_tcu_vld;
sio_tcu_data__in tcu_siu.sio_tcu_data__in;
sio_tcu_vld__in tcu_siu.sio_tcu_vld__in;
bind jt_scan_clk__port jt_scan_clk_bind {
jt_scan_aclk jt_sy_clk.jt_scan_aclk;
jt_scan_bclk jt_sy_clk.jt_scan_bclk;
io_test_mode jt_sy_clk.io_test_mode;
mtaccess jt_sy_clk.mtaccess;
instr_ser_scan jt_sy_clk.instr_ser_scan;
jt_scan_en jt_sy_clk.jt_scan_en;
tcu_asic_array_wr_inhibit jt_sy_clk.tcu_asic_array_wr_inhibit;
tcu_spc0_array_wr_inhibit jt_sy_clk.tcu_spc0_array_wr_inhibit;
tcu_spc1_array_wr_inhibit jt_sy_clk.tcu_spc1_array_wr_inhibit;
tcu_spc2_array_wr_inhibit jt_sy_clk.tcu_spc2_array_wr_inhibit;
tcu_spc3_array_wr_inhibit jt_sy_clk.tcu_spc3_array_wr_inhibit;
tcu_spc4_array_wr_inhibit jt_sy_clk.tcu_spc4_array_wr_inhibit;
tcu_spc5_array_wr_inhibit jt_sy_clk.tcu_spc5_array_wr_inhibit;
tcu_spc6_array_wr_inhibit jt_sy_clk.tcu_spc6_array_wr_inhibit;
tcu_spc7_array_wr_inhibit jt_sy_clk.tcu_spc7_array_wr_inhibit;
bind shscan__port shscan_bind {
shscan_spc_aclk shscan.tcu_spc_shscan_aclk;
shscan_spc_bclk shscan.tcu_spc_shscan_bclk;
shscan_spc_se shscan.tcu_spc_shscan_scan_en;
shscan_spc_pce_ov shscan.tcu_spc_shscan_pce_ov;
shscan_spc_shscanid shscan.tcu_spc_shscanid;
shscan.tcu_spc0_shscan_clk_stop
, shscan.tcu_spc1_shscan_clk_stop
, shscan.tcu_spc2_shscan_clk_stop
, shscan.tcu_spc3_shscan_clk_stop
, shscan.tcu_spc4_shscan_clk_stop
, shscan.tcu_spc5_shscan_clk_stop
, shscan.tcu_spc6_shscan_clk_stop
, shscan.tcu_spc7_shscan_clk_stop
shscan_l2t_aclk shscan.tcu_l2t_shscan_aclk;
shscan_l2t_bclk shscan.tcu_l2t_shscan_bclk;
shscan_l2t_se shscan.tcu_l2t_shscan_scan_en;
shscan_l2t_pce_ov shscan.tcu_l2t_shscan_pce_ov;
shscan.tcu_l2t0_shscan_clk_stop
, shscan.tcu_l2t1_shscan_clk_stop
, shscan.tcu_l2t2_shscan_clk_stop
, shscan.tcu_l2t3_shscan_clk_stop
, shscan.tcu_l2t4_shscan_clk_stop
, shscan.tcu_l2t5_shscan_clk_stop
, shscan.tcu_l2t6_shscan_clk_stop
, shscan.tcu_l2t7_shscan_clk_stop
shscan.spc7_tcu_shscan_scan_in
, shscan.spc6_tcu_shscan_scan_in
, shscan.spc5_tcu_shscan_scan_in
, shscan.spc4_tcu_shscan_scan_in
, shscan.spc3_tcu_shscan_scan_in
, shscan.spc2_tcu_shscan_scan_in
, shscan.spc1_tcu_shscan_scan_in
, shscan.spc0_tcu_shscan_scan_in
shscan.tcu_spc7_shscan_scan_out
, shscan.tcu_spc6_shscan_scan_out
, shscan.tcu_spc5_shscan_scan_out
, shscan.tcu_spc4_shscan_scan_out
, shscan.tcu_spc3_shscan_scan_out
, shscan.tcu_spc2_shscan_scan_out
, shscan.tcu_spc1_shscan_scan_out
, shscan.tcu_spc0_shscan_scan_out
bind TCU_rst_port tcu_rst_bind {
PWRON_RST_L tcu_rst_if.PWRON_RST_L;
tcu_por_reset tcu_rst_if.tcu_por_reset;
rst_tcu_asicflush_stop_req tcu_rst_if.rst_tcu_asicflush_stop_req;
tcu_rst_asicflush_stop_ack tcu_rst_if.tcu_rst_asicflush_stop_ack;
rst_tcu_flush_init_req tcu_rst_if.rst_tcu_flush_init_req;
tcu_rst_flush_init_ack tcu_rst_if.tcu_rst_flush_init_ack;
rst_tcu_flush_stop_req tcu_rst_if.rst_tcu_flush_stop_req;
tcu_rst_flush_stop_ack tcu_rst_if.tcu_rst_flush_stop_ack;
tcu_efu_read_start tcu_rst_if.tcu_efu_read_start;
tcu_rst_efu_done tcu_rst_if.tcu_rst_efu_done;
rst_ncu_unpark_thread tcu_rst_if.rst_ncu_unpark_thread;
bind TCU_corebank_port tcu_corebank_bind {
l2clk tcu_corebank_if.l2clk;
core_available tcu_corebank_if.core_available;
core_enable tcu_corebank_if.core_enable;
bank_available tcu_corebank_if.bank_available;
bank_enable tcu_corebank_if.bank_enable;
bind TCU_clkstop_port tcu_clkstop_bind {
tcu_clkstop_if.tcu_spc7_clk_stop,
tcu_clkstop_if.tcu_spc6_clk_stop,
tcu_clkstop_if.tcu_spc5_clk_stop,
tcu_clkstop_if.tcu_spc4_clk_stop,
tcu_clkstop_if.tcu_spc3_clk_stop,
tcu_clkstop_if.tcu_spc2_clk_stop,
tcu_clkstop_if.tcu_spc1_clk_stop,
tcu_clkstop_if.tcu_spc0_clk_stop
tcu_clkstop_if.tcu_spc7_shscan_clk_stop,
tcu_clkstop_if.tcu_spc6_shscan_clk_stop,
tcu_clkstop_if.tcu_spc5_shscan_clk_stop,
tcu_clkstop_if.tcu_spc4_shscan_clk_stop,
tcu_clkstop_if.tcu_spc3_shscan_clk_stop,
tcu_clkstop_if.tcu_spc2_shscan_clk_stop,
tcu_clkstop_if.tcu_spc1_shscan_clk_stop,
tcu_clkstop_if.tcu_spc0_shscan_clk_stop
tcu_clkstop_if.tcu_l2b7_clk_stop,
tcu_clkstop_if.tcu_l2b6_clk_stop,
tcu_clkstop_if.tcu_l2b5_clk_stop,
tcu_clkstop_if.tcu_l2b4_clk_stop,
tcu_clkstop_if.tcu_l2b3_clk_stop,
tcu_clkstop_if.tcu_l2b2_clk_stop,
tcu_clkstop_if.tcu_l2b1_clk_stop,
tcu_clkstop_if.tcu_l2b0_clk_stop
tcu_clkstop_if.tcu_l2d7_clk_stop,
tcu_clkstop_if.tcu_l2d6_clk_stop,
tcu_clkstop_if.tcu_l2d5_clk_stop,
tcu_clkstop_if.tcu_l2d4_clk_stop,
tcu_clkstop_if.tcu_l2d3_clk_stop,
tcu_clkstop_if.tcu_l2d2_clk_stop,
tcu_clkstop_if.tcu_l2d1_clk_stop,
tcu_clkstop_if.tcu_l2d0_clk_stop
tcu_clkstop_if.tcu_l2t7_clk_stop,
tcu_clkstop_if.tcu_l2t6_clk_stop,
tcu_clkstop_if.tcu_l2t5_clk_stop,
tcu_clkstop_if.tcu_l2t4_clk_stop,
tcu_clkstop_if.tcu_l2t3_clk_stop,
tcu_clkstop_if.tcu_l2t2_clk_stop,
tcu_clkstop_if.tcu_l2t1_clk_stop,
tcu_clkstop_if.tcu_l2t0_clk_stop
tcu_clkstop_if.tcu_l2t7_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t6_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t5_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t4_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t3_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t2_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t1_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t0_shscan_clk_stop
tcu_clkstop_if.tcu_mcu3_clk_stop,
tcu_clkstop_if.tcu_mcu2_clk_stop,
tcu_clkstop_if.tcu_mcu1_clk_stop,
tcu_clkstop_if.tcu_mcu0_clk_stop
tcu_clkstop_if.tcu_mcu3_dr_clk_stop,
tcu_clkstop_if.tcu_mcu2_dr_clk_stop,
tcu_clkstop_if.tcu_mcu1_dr_clk_stop,
tcu_clkstop_if.tcu_mcu0_dr_clk_stop
tcu_clkstop_if.tcu_mcu3_io_clk_stop,
tcu_clkstop_if.tcu_mcu2_io_clk_stop,
tcu_clkstop_if.tcu_mcu1_io_clk_stop,
tcu_clkstop_if.tcu_mcu0_io_clk_stop
tcu_clkstop_if.tcu_mcu3_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu2_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu1_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu0_fbd_clk_stop
soc0_clkstop { // warning: order is matter
tcu_clkstop_if.tcu_ccx_clk_stop, // [4]
tcu_clkstop_if.tcu_efu_clk_stop,
tcu_clkstop_if.tcu_ncu_clk_stop,
tcu_clkstop_if.tcu_sii_clk_stop,
tcu_clkstop_if.tcu_sio_clk_stop // [0]
soc0_io_clkstop { // warning: order is matter
tcu_clkstop_if.tcu_db0_clk_stop, // [6]
tcu_clkstop_if.tcu_db1_clk_stop,
tcu_clkstop_if.tcu_efu_io_clk_stop,
tcu_clkstop_if.tcu_mio_clk_stop,
tcu_clkstop_if.tcu_ncu_io_clk_stop,
tcu_clkstop_if.tcu_sii_io_clk_stop,
tcu_clkstop_if.tcu_sio_io_clk_stop // [0]
soc1_io_clkstop { // warning: order is matter
tcu_clkstop_if.tcu_mac_io_clk_stop, // [3]
tcu_clkstop_if.tcu_rdp_io_clk_stop,
tcu_clkstop_if.tcu_rtx_io_clk_stop,
tcu_clkstop_if.tcu_tds_io_clk_stop // [0]
soc2_io_clkstop tcu_clkstop_if.tcu_dmu_io_clk_stop;
soc3_io_clkstop tcu_clkstop_if.tcu_peu_io_clk_stop;
soc3_clkstop tcu_clkstop_if.tcu_peu_pc_clk_stop;
ccu_clkstop tcu_clkstop_if.tcu_ccu_clk_stop;
ccu_io_clkstop tcu_clkstop_if.tcu_ccu_io_clk_stop;
rst_clkstop tcu_clkstop_if.tcu_rst_clk_stop;
rst_io_clkstop tcu_clkstop_if.tcu_rst_io_clk_stop;
all_clk_stop_sigs { // warning: order is matter.
tcu_clkstop_if.tcu_tds_io_clk_stop, // warn: in reverse alphabetical order
tcu_clkstop_if.tcu_spc7_shscan_clk_stop,
tcu_clkstop_if.tcu_spc7_clk_stop,
tcu_clkstop_if.tcu_spc6_shscan_clk_stop,
tcu_clkstop_if.tcu_spc6_clk_stop,
tcu_clkstop_if.tcu_spc5_shscan_clk_stop,
tcu_clkstop_if.tcu_spc5_clk_stop,
tcu_clkstop_if.tcu_spc4_shscan_clk_stop,
tcu_clkstop_if.tcu_spc4_clk_stop,
tcu_clkstop_if.tcu_spc3_shscan_clk_stop,
tcu_clkstop_if.tcu_spc3_clk_stop,
tcu_clkstop_if.tcu_spc2_shscan_clk_stop,
tcu_clkstop_if.tcu_spc2_clk_stop,
tcu_clkstop_if.tcu_spc1_shscan_clk_stop,
tcu_clkstop_if.tcu_spc1_clk_stop,
tcu_clkstop_if.tcu_spc0_shscan_clk_stop,
tcu_clkstop_if.tcu_spc0_clk_stop,
tcu_clkstop_if.tcu_sio_io_clk_stop,
tcu_clkstop_if.tcu_sio_clk_stop,
tcu_clkstop_if.tcu_sii_io_clk_stop,
tcu_clkstop_if.tcu_sii_clk_stop,
tcu_clkstop_if.tcu_rtx_io_clk_stop,
tcu_clkstop_if.tcu_rst_io_clk_stop,
tcu_clkstop_if.tcu_rst_clk_stop,
tcu_clkstop_if.tcu_rdp_io_clk_stop,
tcu_clkstop_if.tcu_peu_pc_clk_stop,
tcu_clkstop_if.tcu_peu_io_clk_stop,
tcu_clkstop_if.tcu_ncu_io_clk_stop,
tcu_clkstop_if.tcu_ncu_clk_stop,
tcu_clkstop_if.tcu_mio_clk_stop,
tcu_clkstop_if.tcu_mcu3_io_clk_stop,
tcu_clkstop_if.tcu_mcu3_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu3_dr_clk_stop,
tcu_clkstop_if.tcu_mcu3_clk_stop,
tcu_clkstop_if.tcu_mcu2_io_clk_stop,
tcu_clkstop_if.tcu_mcu2_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu2_dr_clk_stop,
tcu_clkstop_if.tcu_mcu2_clk_stop,
tcu_clkstop_if.tcu_mcu1_io_clk_stop,
tcu_clkstop_if.tcu_mcu1_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu1_dr_clk_stop,
tcu_clkstop_if.tcu_mcu1_clk_stop,
tcu_clkstop_if.tcu_mcu0_io_clk_stop,
tcu_clkstop_if.tcu_mcu0_fbd_clk_stop,
tcu_clkstop_if.tcu_mcu0_dr_clk_stop,
tcu_clkstop_if.tcu_mcu0_clk_stop,
tcu_clkstop_if.tcu_mac_io_clk_stop,
tcu_clkstop_if.tcu_l2t7_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t7_clk_stop,
tcu_clkstop_if.tcu_l2t6_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t6_clk_stop,
tcu_clkstop_if.tcu_l2t5_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t5_clk_stop,
tcu_clkstop_if.tcu_l2t4_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t4_clk_stop,
tcu_clkstop_if.tcu_l2t3_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t3_clk_stop,
tcu_clkstop_if.tcu_l2t2_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t2_clk_stop,
tcu_clkstop_if.tcu_l2t1_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t1_clk_stop,
tcu_clkstop_if.tcu_l2t0_shscan_clk_stop,
tcu_clkstop_if.tcu_l2t0_clk_stop,
tcu_clkstop_if.tcu_l2d7_clk_stop,
tcu_clkstop_if.tcu_l2d6_clk_stop,
tcu_clkstop_if.tcu_l2d5_clk_stop,
tcu_clkstop_if.tcu_l2d4_clk_stop,
tcu_clkstop_if.tcu_l2d3_clk_stop,
tcu_clkstop_if.tcu_l2d2_clk_stop,
tcu_clkstop_if.tcu_l2d1_clk_stop,
tcu_clkstop_if.tcu_l2d0_clk_stop,
tcu_clkstop_if.tcu_l2b7_clk_stop,
tcu_clkstop_if.tcu_l2b6_clk_stop,
tcu_clkstop_if.tcu_l2b5_clk_stop,
tcu_clkstop_if.tcu_l2b4_clk_stop,
tcu_clkstop_if.tcu_l2b3_clk_stop,
tcu_clkstop_if.tcu_l2b2_clk_stop,
tcu_clkstop_if.tcu_l2b1_clk_stop,
tcu_clkstop_if.tcu_l2b0_clk_stop,
tcu_clkstop_if.tcu_efu_io_clk_stop,
tcu_clkstop_if.tcu_efu_clk_stop,
tcu_clkstop_if.tcu_dmu_io_clk_stop,
tcu_clkstop_if.tcu_db1_clk_stop,
tcu_clkstop_if.tcu_db0_clk_stop,
tcu_clkstop_if.tcu_ccx_clk_stop,
tcu_clkstop_if.tcu_ccu_io_clk_stop,
tcu_clkstop_if.tcu_ccu_clk_stop
bind TCU_dbg_event_port tcu_dbg_event_bind {
l2clk tcu_dbg_event_if.l2clk;
tcu_dbg_event_if.spc7_hardstop_request,
tcu_dbg_event_if.spc6_hardstop_request,
tcu_dbg_event_if.spc5_hardstop_request,
tcu_dbg_event_if.spc4_hardstop_request,
tcu_dbg_event_if.spc3_hardstop_request,
tcu_dbg_event_if.spc2_hardstop_request,
tcu_dbg_event_if.spc1_hardstop_request,
tcu_dbg_event_if.spc0_hardstop_request
tcu_dbg_event_if.spc7_softstop_request,
tcu_dbg_event_if.spc6_softstop_request,
tcu_dbg_event_if.spc5_softstop_request,
tcu_dbg_event_if.spc4_softstop_request,
tcu_dbg_event_if.spc3_softstop_request,
tcu_dbg_event_if.spc2_softstop_request,
tcu_dbg_event_if.spc1_softstop_request,
tcu_dbg_event_if.spc0_softstop_request
tcu_dbg_event_if.spc7_trigger_pulse,
tcu_dbg_event_if.spc6_trigger_pulse,
tcu_dbg_event_if.spc5_trigger_pulse,
tcu_dbg_event_if.spc4_trigger_pulse,
tcu_dbg_event_if.spc3_trigger_pulse,
tcu_dbg_event_if.spc2_trigger_pulse,
tcu_dbg_event_if.spc1_trigger_pulse,
tcu_dbg_event_if.spc0_trigger_pulse
soc_hard_stop tcu_dbg_event_if.dbg1_tcu_soc_hard_stop;
soc_trigout tcu_dbg_event_if.dbg1_tcu_soc_asrt_trigout;
tcu_mio_trigout tcu_dbg_event_if.tcu_mio_trigout;
mio_tcu_trigin tcu_dbg_event_if.mio_tcu_trigin;
bind TCU_dbg_event_port tcu_dbg_event_out_bind {
l2clk tcu_dbg_event_out_if.l2clk;
tcu_dbg_event_out_if.spc7_hardstop_request,
tcu_dbg_event_out_if.spc6_hardstop_request,
tcu_dbg_event_out_if.spc5_hardstop_request,
tcu_dbg_event_out_if.spc4_hardstop_request,
tcu_dbg_event_out_if.spc3_hardstop_request,
tcu_dbg_event_out_if.spc2_hardstop_request,
tcu_dbg_event_out_if.spc1_hardstop_request,
tcu_dbg_event_out_if.spc0_hardstop_request
tcu_dbg_event_out_if.spc7_softstop_request,
tcu_dbg_event_out_if.spc6_softstop_request,
tcu_dbg_event_out_if.spc5_softstop_request,
tcu_dbg_event_out_if.spc4_softstop_request,
tcu_dbg_event_out_if.spc3_softstop_request,
tcu_dbg_event_out_if.spc2_softstop_request,
tcu_dbg_event_out_if.spc1_softstop_request,
tcu_dbg_event_out_if.spc0_softstop_request
tcu_dbg_event_out_if.spc7_trigger_pulse,
tcu_dbg_event_out_if.spc6_trigger_pulse,
tcu_dbg_event_out_if.spc5_trigger_pulse,
tcu_dbg_event_out_if.spc4_trigger_pulse,
tcu_dbg_event_out_if.spc3_trigger_pulse,
tcu_dbg_event_out_if.spc2_trigger_pulse,
tcu_dbg_event_out_if.spc1_trigger_pulse,
tcu_dbg_event_out_if.spc0_trigger_pulse
soc_hard_stop void; // internal signal
soc_trigout void; // internal signal
tcu_mio_trigout void; // internal signal
mio_tcu_trigin void; // internal signal
bind stci__port stci_bind {
tcu_stciclk stci.tcu_stciclk;
tcu_stcicfg stci.tcu_stcicfg;
tcu_stcid stci.tcu_stcid;
stciq_tcu stci.stciq_tcu;
update_dr_state stci.update_dr_state;
capture_dr_state stci.capture_dr_state;
shift_dr_state stci.shift_dr_state;
stci_acc_mode stci.stci_acc_mode;
tap_state stci.tap_state;
signal_to_disable_checker stci.signal_to_disable_checker;
projects / OpenSPARC-T2-DV / blob