verif/env/tcu/vera/packets/tcu_spc_packet.vr

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: tcu_spc_packet.vr
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#include <vera_defines.vrh>
#include "tcu_top_defines.vri"

enum SPC_DEBUG_TYPE { INIT_SPC, CORE_RUN, SS, DO };
//////////////////////////////////////////////////
//
//////////////////////////////////////////////////

class tcu_spc_packet {
     SPC_DEBUG_TYPE type;
     reg [(`NUM_THREADS-1):0] doss_enable;
     reg send_req;
     integer cycle_count;

     task new (
       SPC_DEBUG_TYPE type,
       integer cycle_count
     );
}

/////////////////////////////////////////////////
//
/////////////////////////////////////////////////
task tcu_spc_packet::new (
     SPC_DEBUG_TYPE type = INIT_SPC,
     integer cycle_count = 1
)

{
    this.type = type;
    this.doss_enable = `NUM_THREADS'b0;
    this.cycle_count = this.cycle_count;
    this.send_req = 0;
}