verif/env/tcu/vera/packets/ucb___packet.vr

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: ucb___packet.vr
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// GNU General Public License for more details.
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// ========== Copyright Header End ============================================
#include <vera_defines.vrh>

class UCB___packet {
  string name;
  bit  [127:0] pkt; // the whole 128-bit ucb packet
  //---each field----
  bit [63:0] payload;   // [127:64] of ucb pkt
  bit  [8:0] bytemask;  //  [63:55] of ucb pkt
  bit [39:0] addr;      //  [54:15] of ucb pkt
  bit  [2:0] req_size;  //  [14:12] of ucb pkt
  bit  [1:0] buffer_id; //  [11:10] of ucb pkt
  bit  [2:0] cpu_id;    //    [9:7] of ucb pkt
  bit  [2:0] thread_id; //    [6:4] of ucb pkt
  bit  [3:0] pkt_type;  //    [3:0] of ucb pkt

  task new(string name="UCB_pkt", bit [127:0] pkt=0) {
    this.name = name;
    this.pkt = pkt;
    break_into_fields();
  }

  //---break 128-bit value of ucb pkt into each field---
  task break_into_fields() {
    this.payload   = this.pkt[127:64];
    this.bytemask  = this.pkt[63:55];
    this.addr      = this.pkt[54:15];
    this.req_size  = this.pkt[14:12];
    this.buffer_id = this.pkt[11:10];
    this.cpu_id    = this.pkt[9:7];
    this.thread_id = this.pkt[6:4];
    this.pkt_type  = this.pkt[3:0];
  }
}