verif/model/pcie/pcie_common/peu_csr_defines.hpp

// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: peu_csr_defines.hpp
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
//
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// have any questions.
//
// ========== Copyright Header End ============================================
#ifndef INC_peu_csr_defines_hpp__
#define INC_peu_csr_defines_hpp__


#define PEU_INSTANCE_ID_VALUE_A 0
#define PEU_INSTANCE_ID_VALUE_B 1

#define PEU_CSR_A_TLU_CTL_HW_ADDR       sc_uint<64>("0b000000011010000000000000000")
#define PEU_CSR_B_TLU_CTL_HW_ADDR       sc_uint<64>("0b000000011110000000000000000")
#define PEU_CSR_A_TLU_STS_HW_ADDR       sc_uint<64>("0b000000011010000000000000001")
#define PEU_CSR_B_TLU_STS_HW_ADDR       sc_uint<64>("0b000000011110000000000000001")
#define PEU_CSR_A_TRN_OFF_HW_ADDR       sc_uint<64>("0b000000011010000000000000010")
#define PEU_CSR_B_TRN_OFF_HW_ADDR       sc_uint<64>("0b000000011110000000000000010")
#define PEU_CSR_A_TLU_ICI_HW_ADDR       sc_uint<64>("0b000000011010000000000000011")
#define PEU_CSR_B_TLU_ICI_HW_ADDR       sc_uint<64>("0b000000011110000000000000011")
#define PEU_CSR_A_TLU_DIAG_HW_ADDR      sc_uint<64>("0b000000011010000000000100000")
#define PEU_CSR_B_TLU_DIAG_HW_ADDR      sc_uint<64>("0b000000011110000000000100000")
#define PEU_CSR_A_TLU_ECC_HW_ADDR       sc_uint<64>("0b000000011010000000001000000")
#define PEU_CSR_B_TLU_ECC_HW_ADDR       sc_uint<64>("0b000000011110000000001000000")
#define PEU_CSR_A_TLU_ECL_HW_ADDR       sc_uint<64>("0b000000011010000000001000001")
#define PEU_CSR_B_TLU_ECL_HW_ADDR       sc_uint<64>("0b000000011110000000001000001")
#define PEU_CSR_A_TLU_ERB_HW_ADDR       sc_uint<64>("0b000000011010000000001000010")
#define PEU_CSR_B_TLU_ERB_HW_ADDR       sc_uint<64>("0b000000011110000000001000010")
#define PEU_CSR_A_TLU_ICA_HW_ADDR       sc_uint<64>("0b000000011010000000001000011")
#define PEU_CSR_B_TLU_ICA_HW_ADDR       sc_uint<64>("0b000000011110000000001000011")
#define PEU_CSR_A_TLU_ICR_HW_ADDR       sc_uint<64>("0b000000011010000000001000100")
#define PEU_CSR_B_TLU_ICR_HW_ADDR       sc_uint<64>("0b000000011110000000001000100")
#define PEU_CSR_A_OE_LOG_HW_ADDR        sc_uint<64>("0b000000011010000001000000000")
#define PEU_CSR_B_OE_LOG_HW_ADDR        sc_uint<64>("0b000000011110000001000000000")
#define PEU_CSR_A_OE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011010000001000000001")
#define PEU_CSR_B_OE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011110000001000000001")
#define PEU_CSR_A_OE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011010000001000000010")
#define PEU_CSR_B_OE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011110000001000000010")
#define PEU_CSR_A_OE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010000001000000011")
#define PEU_CSR_B_OE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110000001000000011")
#define PEU_CSR_A_OE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010000001000000100")
#define PEU_CSR_B_OE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110000001000000100")
#define PEU_CSR_A_ROE_HDR1_HW_ADDR      sc_uint<64>("0b000000011010000001000000101")
#define PEU_CSR_B_ROE_HDR1_HW_ADDR      sc_uint<64>("0b000000011110000001000000101")
#define PEU_CSR_A_ROE_HDR2_HW_ADDR      sc_uint<64>("0b000000011010000001000000110")
#define PEU_CSR_B_ROE_HDR2_HW_ADDR      sc_uint<64>("0b000000011110000001000000110")
#define PEU_CSR_A_TOE_HDR1_HW_ADDR      sc_uint<64>("0b000000011010000001000000111")
#define PEU_CSR_B_TOE_HDR1_HW_ADDR      sc_uint<64>("0b000000011110000001000000111")
#define PEU_CSR_A_TOE_HDR2_HW_ADDR      sc_uint<64>("0b000000011010000001000001000")
#define PEU_CSR_B_TOE_HDR2_HW_ADDR      sc_uint<64>("0b000000011110000001000001000")
#define PEU_CSR_A_TLU_PRFC_HW_ADDR      sc_uint<64>("0b000000011010000010000000000")
#define PEU_CSR_B_TLU_PRFC_HW_ADDR      sc_uint<64>("0b000000011110000010000000000")
#define PEU_CSR_A_TLU_PRF0_HW_ADDR      sc_uint<64>("0b000000011010000010000000001")
#define PEU_CSR_B_TLU_PRF0_HW_ADDR      sc_uint<64>("0b000000011110000010000000001")
#define PEU_CSR_A_TLU_PRF1_HW_ADDR      sc_uint<64>("0b000000011010000010000000010")
#define PEU_CSR_B_TLU_PRF1_HW_ADDR      sc_uint<64>("0b000000011110000010000000010")
#define PEU_CSR_A_TLU_PRF2_HW_ADDR      sc_uint<64>("0b000000011010000010000000011")
#define PEU_CSR_B_TLU_PRF2_HW_ADDR      sc_uint<64>("0b000000011110000010000000011")
#define PEU_CSR_A_TLU_DBG_SEL_A_HW_ADDR sc_uint<64>("0b000000011010000011000000000")
#define PEU_CSR_B_TLU_DBG_SEL_A_HW_ADDR sc_uint<64>("0b000000011110000011000000000")
#define PEU_CSR_A_TLU_DBG_SEL_B_HW_ADDR sc_uint<64>("0b000000011010000011000000001")
#define PEU_CSR_B_TLU_DBG_SEL_B_HW_ADDR sc_uint<64>("0b000000011110000011000000001")
#define PEU_CSR_A_DEV_CAP_HW_ADDR       sc_uint<64>("0b000000011010010000000000000")
#define PEU_CSR_B_DEV_CAP_HW_ADDR       sc_uint<64>("0b000000011110010000000000000")
#define PEU_CSR_A_DEV_CTL_HW_ADDR       sc_uint<64>("0b000000011010010000000000001")
#define PEU_CSR_B_DEV_CTL_HW_ADDR       sc_uint<64>("0b000000011110010000000000001")
#define PEU_CSR_A_DEV_STS_HW_ADDR       sc_uint<64>("0b000000011010010000000000010")
#define PEU_CSR_B_DEV_STS_HW_ADDR       sc_uint<64>("0b000000011110010000000000010")
#define PEU_CSR_A_LNK_CAP_HW_ADDR       sc_uint<64>("0b000000011010010000000000011")
#define PEU_CSR_B_LNK_CAP_HW_ADDR       sc_uint<64>("0b000000011110010000000000011")
#define PEU_CSR_A_LNK_CTL_HW_ADDR       sc_uint<64>("0b000000011010010000000000100")
#define PEU_CSR_B_LNK_CTL_HW_ADDR       sc_uint<64>("0b000000011110010000000000100")
#define PEU_CSR_A_LNK_STS_HW_ADDR       sc_uint<64>("0b000000011010010000000000101")
#define PEU_CSR_B_LNK_STS_HW_ADDR       sc_uint<64>("0b000000011110010000000000101")
#define PEU_CSR_A_SLT_CAP_HW_ADDR       sc_uint<64>("0b000000011010010000000000110")
#define PEU_CSR_B_SLT_CAP_HW_ADDR       sc_uint<64>("0b000000011110010000000000110")
#define PEU_CSR_A_UE_LOG_HW_ADDR        sc_uint<64>("0b000000011010010001000000000")
#define PEU_CSR_B_UE_LOG_HW_ADDR        sc_uint<64>("0b000000011110010001000000000")
#define PEU_CSR_A_UE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011010010001000000001")
#define PEU_CSR_B_UE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011110010001000000001")
#define PEU_CSR_A_UE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011010010001000000010")
#define PEU_CSR_B_UE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011110010001000000010")
#define PEU_CSR_A_UE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010010001000000011")
#define PEU_CSR_B_UE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110010001000000011")
#define PEU_CSR_A_UE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010010001000000100")
#define PEU_CSR_B_UE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110010001000000100")
#define PEU_CSR_A_RUE_HDR1_HW_ADDR      sc_uint<64>("0b000000011010010001000000101")
#define PEU_CSR_B_RUE_HDR1_HW_ADDR      sc_uint<64>("0b000000011110010001000000101")
#define PEU_CSR_A_RUE_HDR2_HW_ADDR      sc_uint<64>("0b000000011010010001000000110")
#define PEU_CSR_B_RUE_HDR2_HW_ADDR      sc_uint<64>("0b000000011110010001000000110")
#define PEU_CSR_A_TUE_HDR1_HW_ADDR      sc_uint<64>("0b000000011010010001000000111")
#define PEU_CSR_B_TUE_HDR1_HW_ADDR      sc_uint<64>("0b000000011110010001000000111")
#define PEU_CSR_A_TUE_HDR2_HW_ADDR      sc_uint<64>("0b000000011010010001000001000")
#define PEU_CSR_B_TUE_HDR2_HW_ADDR      sc_uint<64>("0b000000011110010001000001000")
#define PEU_CSR_A_CE_LOG_HW_ADDR        sc_uint<64>("0b000000011010100001000000000")
#define PEU_CSR_B_CE_LOG_HW_ADDR        sc_uint<64>("0b000000011110100001000000000")
#define PEU_CSR_A_CE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011010100001000000001")
#define PEU_CSR_B_CE_INT_EN_HW_ADDR     sc_uint<64>("0b000000011110100001000000001")
#define PEU_CSR_A_CE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011010100001000000010")
#define PEU_CSR_B_CE_EN_ERR_HW_ADDR     sc_uint<64>("0b000000011110100001000000010")
#define PEU_CSR_A_CE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010100001000000011")
#define PEU_CSR_B_CE_ERR_RW1C_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110100001000000011")
#define PEU_CSR_A_CE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011010100001000000100")
#define PEU_CSR_B_CE_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b000000011110100001000000100")
#define PEU_CSR_A_PEU_DLPL_SERDES_REV_HW_ADDR   sc_uint<64>("0b000000011011100010000000000")
#define PEU_CSR_B_PEU_DLPL_SERDES_REV_HW_ADDR   sc_uint<64>("0b000000011111100010000000000")
#define PEU_CSR_A_ACKNAK_THRESH_HW_ADDR sc_uint<64>("0b000000011011100010000000001")
#define PEU_CSR_B_ACKNAK_THRESH_HW_ADDR sc_uint<64>("0b000000011111100010000000001")
#define PEU_CSR_A_ACKNAK_TIMER_HW_ADDR  sc_uint<64>("0b000000011011100010000000010")
#define PEU_CSR_B_ACKNAK_TIMER_HW_ADDR  sc_uint<64>("0b000000011111100010000000010")
#define PEU_CSR_A_REPLAY_TIM_THRESH_HW_ADDR     sc_uint<64>("0b000000011011100010000000011")
#define PEU_CSR_B_REPLAY_TIM_THRESH_HW_ADDR     sc_uint<64>("0b000000011111100010000000011")
#define PEU_CSR_A_REPLAY_TIMER_HW_ADDR  sc_uint<64>("0b000000011011100010000000100")
#define PEU_CSR_B_REPLAY_TIMER_HW_ADDR  sc_uint<64>("0b000000011111100010000000100")
#define PEU_CSR_A_VEN_DLLP_MSG_HW_ADDR  sc_uint<64>("0b000000011011100010000001000")
#define PEU_CSR_B_VEN_DLLP_MSG_HW_ADDR  sc_uint<64>("0b000000011111100010000001000")
#define PEU_CSR_A_FORCE_LTSSM_HW_ADDR   sc_uint<64>("0b000000011011100010000001010")
#define PEU_CSR_B_FORCE_LTSSM_HW_ADDR   sc_uint<64>("0b000000011111100010000001010")
#define PEU_CSR_A_LINK_CFG_HW_ADDR      sc_uint<64>("0b000000011011100010000001011")
#define PEU_CSR_B_LINK_CFG_HW_ADDR      sc_uint<64>("0b000000011111100010000001011")
#define PEU_CSR_A_LINK_CTL_HW_ADDR      sc_uint<64>("0b000000011011100010000001100")
#define PEU_CSR_B_LINK_CTL_HW_ADDR      sc_uint<64>("0b000000011111100010000001100")
#define PEU_CSR_A_LANE_SKEW_HW_ADDR     sc_uint<64>("0b000000011011100010000001101")
#define PEU_CSR_B_LANE_SKEW_HW_ADDR     sc_uint<64>("0b000000011111100010000001101")
#define PEU_CSR_A_SYMBOL_NUM_HW_ADDR    sc_uint<64>("0b000000011011100010000001110")
#define PEU_CSR_B_SYMBOL_NUM_HW_ADDR    sc_uint<64>("0b000000011111100010000001110")
#define PEU_CSR_A_SYMBOL_TIMER_HW_ADDR  sc_uint<64>("0b000000011011100010000001111")
#define PEU_CSR_B_SYMBOL_TIMER_HW_ADDR  sc_uint<64>("0b000000011111100010000001111")
#define PEU_CSR_A_CORE_STATUS_HW_ADDR   sc_uint<64>("0b000000011011100010000100000")
#define PEU_CSR_B_CORE_STATUS_HW_ADDR   sc_uint<64>("0b000000011111100010000100000")
#define PEU_CSR_A_EVENT_ERR_LOG_EN_HW_ADDR      sc_uint<64>("0b000000011011100010000100001")
#define PEU_CSR_B_EVENT_ERR_LOG_EN_HW_ADDR      sc_uint<64>("0b000000011111100010000100001")
#define PEU_CSR_A_EVENT_ERR_INT_EN_HW_ADDR      sc_uint<64>("0b000000011011100010000100010")
#define PEU_CSR_B_EVENT_ERR_INT_EN_HW_ADDR      sc_uint<64>("0b000000011111100010000100010")
#define PEU_CSR_A_EVENT_ERR_INT_STS_HW_ADDR     sc_uint<64>("0b000000011011100010000100011")
#define PEU_CSR_B_EVENT_ERR_INT_STS_HW_ADDR     sc_uint<64>("0b000000011111100010000100011")
#define PEU_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ADDR  sc_uint<64>("0b000000011011100010000100100")
#define PEU_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ADDR  sc_uint<64>("0b000000011111100010000100100")
#define PEU_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ADDR  sc_uint<64>("0b000000011011100010000100101")
#define PEU_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ADDR  sc_uint<64>("0b000000011111100010000100101")
#define PEU_CSR_A_LNK_BIT_ERR_CNT_1_HW_ADDR     sc_uint<64>("0b000000011011100010000100110")
#define PEU_CSR_B_LNK_BIT_ERR_CNT_1_HW_ADDR     sc_uint<64>("0b000000011111100010000100110")
#define PEU_CSR_A_LNK_BIT_ERR_CNT_2_HW_ADDR     sc_uint<64>("0b000000011011100010000100111")
#define PEU_CSR_B_LNK_BIT_ERR_CNT_2_HW_ADDR     sc_uint<64>("0b000000011111100010000100111")
#define PEU_CSR_A_SERDES_PLL_HW_ADDR    sc_uint<64>("0b000000011011100010001000000")
#define PEU_CSR_B_SERDES_PLL_HW_ADDR    sc_uint<64>("0b000000011111100010001000000")
#define PEU_CSR_A_SERDES_RECEIVER_LANE_CTL_HW_ADDR      sc_uint<64>("0b000000011011100010001100000")
#define PEU_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ADDR      sc_uint<64>("0b000000011111100010001100000")
#define PEU_CSR_A_SERDES_RECEIVER_LANE_STATUS_HW_ADDR   sc_uint<64>("0b000000011011100010001110000")
#define PEU_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ADDR   sc_uint<64>("0b000000011111100010001110000")
#define PEU_CSR_A_SERDES_XMITTER_LANE_CTL_HW_ADDR       sc_uint<64>("0b000000011011100010010000000")
#define PEU_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ADDR       sc_uint<64>("0b000000011111100010010000000")
#define PEU_CSR_A_SERDES_XMITTER_LANE_STATUS_HW_ADDR    sc_uint<64>("0b000000011011100010010010000")
#define PEU_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ADDR    sc_uint<64>("0b000000011111100010010010000")
#define PEU_CSR_A_SERDES_MACRO_TEST_CFG_HW_ADDR sc_uint<64>("0b000000011011100010010100000")
#define PEU_CSR_B_SERDES_MACRO_TEST_CFG_HW_ADDR sc_uint<64>("0b000000011111100010010100000")

#define PEU_CSR_TLU_CTL_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000011111111000101111111111111111111")
#define PEU_CSR_TLU_STS_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111111111")
#define PEU_CSR_TRN_OFF_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_TLU_ICI_READ_MASK       sc_uint<64>("0b0000111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_DIAG_READ_MASK      sc_uint<64>("0b0000111110000000111111111111111111111111111111111111111111110011")
#define PEU_CSR_TLU_ECC_READ_MASK       sc_uint<64>("0b0111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_ECL_READ_MASK       sc_uint<64>("0b0111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_ERB_READ_MASK       sc_uint<64>("0b0000000000000000111111111111111100000000000000001111111111111111")
#define PEU_CSR_TLU_ICA_READ_MASK       sc_uint<64>("0b0000111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_ICR_READ_MASK       sc_uint<64>("0b0000111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_OE_LOG_READ_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000111111111111111111111111")
#define PEU_CSR_OE_INT_EN_READ_MASK     sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_OE_EN_ERR_READ_MASK     sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_READ_MASK     sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_READ_MASK     sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_ROE_HDR1_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_ROE_HDR2_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TOE_HDR1_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TOE_HDR2_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRFC_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000111111111111111111")
#define PEU_CSR_TLU_PRF0_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRF1_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRF2_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000011111111111111111111111111111111")
#define PEU_CSR_TLU_DBG_SEL_A_READ_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111111111")
#define PEU_CSR_TLU_DBG_SEL_B_READ_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111111111")
#define PEU_CSR_DEV_CAP_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000111111000111")
#define PEU_CSR_DEV_CTL_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000111000011100000")
#define PEU_CSR_DEV_STS_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000100000")
#define PEU_CSR_LNK_CAP_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_LNK_CTL_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011111011")
#define PEU_CSR_LNK_STS_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000001111111111111")
#define PEU_CSR_SLT_CAP_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000011111111110000000")
#define PEU_CSR_UE_LOG_READ_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000111111111111111111111")
#define PEU_CSR_UE_INT_EN_READ_MASK     sc_uint<64>("0b0000000000011111111111111111111100000000000111111111111111111111")
#define PEU_CSR_UE_EN_ERR_READ_MASK     sc_uint<64>("0b0000000000011111111111111111111100000000000111111111111111111111")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_READ_MASK     sc_uint<64>("0b0000000000010111111100000001000100000000000101111111000000010001")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_READ_MASK     sc_uint<64>("0b0000000000010111111100000001000100000000000101111111000000010001")
#define PEU_CSR_RUE_HDR1_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_RUE_HDR2_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TUE_HDR1_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TUE_HDR2_READ_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_CE_LOG_READ_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000001111111111111")
#define PEU_CSR_CE_INT_EN_READ_MASK     sc_uint<64>("0b0000000000000000000111111111111100000000000000000001111111111111")
#define PEU_CSR_CE_EN_ERR_READ_MASK     sc_uint<64>("0b0000000000000000000111111111111100000000000000000001111111111111")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_READ_MASK     sc_uint<64>("0b0000000000000000000100011100000100000000000000000001000111000001")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_READ_MASK     sc_uint<64>("0b0000000000000000000100011100000100000000000000000001000111000001")
#define PEU_CSR_PEU_DLPL_SERDES_REV_READ_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011111111")
#define PEU_CSR_ACKNAK_THRESH_READ_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_ACKNAK_TIMER_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_REPLAY_TIM_THRESH_READ_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_REPLAY_TIMER_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000111111111111111111")
#define PEU_CSR_VEN_DLLP_MSG_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000011111111111111111111111111111111")
#define PEU_CSR_FORCE_LTSSM_READ_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100011111")
#define PEU_CSR_LINK_CFG_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111100011111")
#define PEU_CSR_LINK_CTL_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000011111111111111110011111100011111")
#define PEU_CSR_LANE_SKEW_READ_MASK     sc_uint<64>("0b0000000000000000000000000000000000000011111111111111111111111111")
#define PEU_CSR_SYMBOL_NUM_READ_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000111011111111111")
#define PEU_CSR_SYMBOL_TIMER_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000011111111111")
#define PEU_CSR_CORE_STATUS_READ_MASK   sc_uint<64>("0b0000011111110011111111111111111111111111111111111111111111111111")
#define PEU_CSR_EVENT_ERR_LOG_EN_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_INT_EN_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_INT_STS_READ_MASK     sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_READ_MASK  sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_READ_MASK     sc_uint<64>("0b1100000000000000000000000000000011111111111111110000001111111111")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_READ_MASK     sc_uint<64>("0b0011111100111111001111110011111100111111001111110011111100111111")
#define PEU_CSR_SERDES_PLL_READ_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011111111")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_READ_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_READ_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000001011")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_READ_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000011111111111")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_READ_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000011")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_READ_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000111111111111111")

#define PEU_CSR_TLU_CTL_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000011111111000101111111111111111111")
//#define PEU_CSR_TLU_STS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100000000")
#define PEU_CSR_TLU_STS_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TRN_OFF_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICI_WRITE_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_DIAG_WRITE_MASK     sc_uint<64>("0b0000111100000000111111111111111111111111111111111111111100000011")
//#define PEU_CSR_TLU_ECC_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECC_WRITE_MASK      sc_uint<64>("0b0111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_ECL_WRITE_MASK      sc_uint<64>("0b0111111111111111111111111111111111111111111111111111111111111111")

//#define PEU_CSR_TLU_ECL_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")

#define PEU_CSR_TLU_ECL_UPDATEP_WRITE_MASK sc_uint<64>("0b01110000000000000000000000000000000000000000011111111111111111111")
#define PEU_CSR_TLU_ECL_UPDATENP_WRITE_MASK sc_uint<64>("0b01110000000000000000000000000000001111111111111111111100000000000000000000")
#define PEU_CSR_TLU_ECL_UPDATECPL_WRITE_MASK sc_uint<64>("0b011100000000000000000000000000000011111111111111111111000000000000000000000000000000000000000")


#define PEU_CSR_TLU_ERB_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICA_WRITE_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_ICR_WRITE_MASK      sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
//#define PEU_CSR_TLU_ICR_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_LOG_WRITE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000111111111111111111111111")
#define PEU_CSR_OE_INT_EN_WRITE_MASK    sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_OE_EN_ERR_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
//#define PEU_CSR_OE_ERR_RW1C_ALIAS_WRITE_MASK  sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
//#define PEU_CSR_OE_ERR_RW1S_ALIAS_WRITE_MASK  sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
 #define PEU_CSR_OE_ERR_RW1C_ALIAS_WRITE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
 #define PEU_CSR_OE_ERR_RW1S_ALIAS_WRITE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR1_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_ROE_HDR2_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TOE_HDR1_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TOE_HDR2_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRFC_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000111111111111111111")
#define PEU_CSR_TLU_PRF0_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRF1_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TLU_PRF2_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000011111111111111111111111111111111")
#define PEU_CSR_TLU_DBG_SEL_A_WRITE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111111111")
#define PEU_CSR_TLU_DBG_SEL_B_WRITE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111111111")
#define PEU_CSR_DEV_CAP_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CTL_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011100000")
#define PEU_CSR_DEV_STS_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CAP_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CTL_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011110011")
#define PEU_CSR_LNK_CTL_RETRAIN_MASK sc_uint<64>("0b0000000000100000")
#define PEU_CSR_LNK_STS_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_STS_TRAIN_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000100000000000")
#define PEU_CSR_LNK_STS_WIDTH_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000001111110000")
#define PEU_CSR_LNK_STS_SPEED_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000001111")
#define PEU_CSR_SLT_CAP_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000011111111110000000")
#define PEU_CSR_UE_LOG_WRITE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000111111111111111111111")
#define PEU_CSR_UE_INT_EN_WRITE_MASK    sc_uint<64>("0b0000000000011111111111111111111100000000000111111111111111111111")
#define PEU_CSR_UE_EN_ERR_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR1_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_RUE_HDR2_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TUE_HDR1_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_TUE_HDR2_WRITE_MASK     sc_uint<64>("0b1111111111111111111111111111111111111111111111111111111111111111")
#define PEU_CSR_CE_LOG_WRITE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000001111111111111")
#define PEU_CSR_CE_INT_EN_WRITE_MASK    sc_uint<64>("0b0000000000000000000111111111111100000000000000000001111111111111")
#define PEU_CSR_CE_EN_ERR_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_PEU_DLPL_SERDES_REV_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_THRESH_WRITE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_ACKNAK_TIMER_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIM_THRESH_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_REPLAY_TIMER_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000011111111111111111111111111111111")
#define PEU_CSR_FORCE_LTSSM_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100011111")
#define PEU_CSR_LINK_CFG_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111100011111")
#define PEU_CSR_LINK_CTL_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000011111111111111110011111100011111")
#define PEU_CSR_LANE_SKEW_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000011111111111111111111111111")
#define PEU_CSR_SYMBOL_NUM_WRITE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000111011111111111")
#define PEU_CSR_SYMBOL_TIMER_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000011111111111")
#define PEU_CSR_CORE_STATUS_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_LOG_EN_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_INT_EN_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_INT_STS_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_WRITE_MASK    sc_uint<64>("0b1000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_WRITE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_PLL_WRITE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011111111")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_WRITE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000001111111111111111")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_WRITE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000011111111111")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_WRITE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_WRITE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000111111111111111")

#define PEU_CSR_TLU_CTL_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100000001")
#define PEU_CSR_TLU_CTL_L0S_TIM_POR_VALUE       sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_CTL_NPWR_EN_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_TLU_CTL_CTO_SEL_POR_VALUE       sc_uint<64>("0b000")
#define PEU_CSR_TLU_CTL_CONFIG_POR_VALUE        sc_uint<64>("0b0000000100000001")
#define PEU_CSR_TLU_STS_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000100")
//#define PEU_CSR_TLU_STS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000100")
#define PEU_CSR_TLU_STS_DRAIN_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_TLU_STS_STATUS_POR_VALUE        sc_uint<64>("0b00000001")
#define PEU_CSR_TRN_OFF_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TRN_OFF_PTO_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ICI_POR_VALUE       sc_uint<64>("0b0000000000000000000000000001000000000000000000100000000011000000")
//                                                 0000
//  CHC : 00000000
//  CDC : 000000000000
//  NHC : 10000000      : 0x80  // changed to 0x10
//  NDC : 000000000000  :
//  PHC : 00100000      : 0x20
//  PDC : 000011000000  : 0xC0
//#define PEU_CSR_TLU_ICI_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICI_CHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ICI_CDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICI_NHC_POR_VALUE   sc_uint<64>("0b00010000")
#define PEU_CSR_TLU_ICI_NDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICI_PHC_POR_VALUE   sc_uint<64>("0b00100000")
#define PEU_CSR_TLU_ICI_PDC_POR_VALUE   sc_uint<64>("0b000011000000")
#define PEU_CSR_TLU_DIAG_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DIAG_ERBI_PAR_POR_VALUE     sc_uint<64>("0b0000")
#define PEU_CSR_TLU_DIAG_ERBI_TRG_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_CHK_DIS_POR_VALUE      sc_uint<64>("0b0000000000000000")
#define PEU_CSR_TLU_DIAG_EPI_PAR_POR_VALUE      sc_uint<64>("0b0000000000000000")
#define PEU_CSR_TLU_DIAG_IDI_PAR_POR_VALUE      sc_uint<64>("0b0000")
#define PEU_CSR_TLU_DIAG_IHI_PAR_POR_VALUE      sc_uint<64>("0b0000")
#define PEU_CSR_TLU_DIAG_EPI_TRG_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_IDI_TRG_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_IHI_TRG_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_MRC_TRG_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_EPP_DIS_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_DIAG_IFC_DIS_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECC_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECC_CHI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECC_NHI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECC_PHI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECC_CHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECC_CDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ECC_NHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECC_NDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ECC_PHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECC_PDC_POR_VALUE   sc_uint<64>("0b000000000000")
//#define PEU_CSR_TLU_ECL_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECL_POR_VALUE       sc_uint<64>("0b0111000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECL_CDI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECL_NDI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECL_PDI_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_TLU_ECL_CHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECL_CDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ECL_NHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECL_NDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ECL_PHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ECL_PDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ERB_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000001000000000000")
#define PEU_CSR_TLU_ERB_CC_POR_VALUE    sc_uint<64>("0b0000000000000000")
#define PEU_CSR_TLU_ERB_CL_POR_VALUE    sc_uint<64>("0b0001000000000000")
//#define PEU_CSR_TLU_ICI_POR_VALUE     sc_uint<64>("0b0000000000000000000000000001000000000000000000100000000011000000")
#define PEU_CSR_TLU_ICA_POR_VALUE       sc_uint<64>("0b0000000000000000000000000001000000000000000000100000000011000000")
//#define PEU_CSR_TLU_ICA_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICA_CHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ICA_CDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICA_NHC_POR_VALUE   sc_uint<64>("0b00010000")
#define PEU_CSR_TLU_ICA_NDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICA_PHC_POR_VALUE   sc_uint<64>("0b00100000")
#define PEU_CSR_TLU_ICA_PDC_POR_VALUE   sc_uint<64>("0b000011000000")
#define PEU_CSR_TLU_ICR_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICR_CHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ICR_CDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICR_NHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ICR_NDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_TLU_ICR_PHC_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_ICR_PDC_POR_VALUE   sc_uint<64>("0b000000000000")
#define PEU_CSR_OE_LOG_POR_VALUE        sc_uint<64>("0b0000000000000000000000000000000000000000111111111111111111111111")
#define PEU_CSR_OE_LOG_EN_POR_VALUE     sc_uint<64>("0b111111111111111111111111")
#define PEU_CSR_OE_INT_EN_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_INT_EN_EN_S_POR_VALUE        sc_uint<64>("0b000000000000000000000000")
#define PEU_CSR_OE_INT_EN_EN_P_POR_VALUE        sc_uint<64>("0b000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_ERR_S_POR_VALUE       sc_uint<64>("0b000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_ERR_P_POR_VALUE       sc_uint<64>("0b000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_SPARE_S_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_MFC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_CTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_NFP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LWC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_MRC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_WUC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_RUC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_CRS_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_IIP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EDP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EHP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LIN_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LRS_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LDN_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LUP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LPU_S_POR_VALUE       sc_uint<64>("0b00")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERU_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EMP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EPE_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EIP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_SPARE_P_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_MFC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_CTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_NFP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LWC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_MRC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_WUC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_RUC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_CRS_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_IIP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EDP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EHP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LIN_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LRS_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LDN_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LUP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_LPU_P_POR_VALUE       sc_uint<64>("0b00")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERU_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EMP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EPE_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_ERP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_EIP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_SPARE_S_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_MFC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_CTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_NFP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LWC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_MRC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_WUC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_RUC_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_CRS_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_IIP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EDP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EHP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LIN_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LRS_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LDN_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LUP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LPU_S_POR_VALUE       sc_uint<64>("0b00")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERU_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EMP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EPE_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EIP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_SPARE_P_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_MFC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_CTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_NFP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LWC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_MRC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_WUC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_RUC_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_CRS_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_IIP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EDP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EHP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LIN_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LRS_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LDN_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LUP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_LPU_P_POR_VALUE       sc_uint<64>("0b00")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERU_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EMP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EPE_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_ERP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_EIP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_ROE_HDR1_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR1_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR2_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR2_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR1_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR1_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR2_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR2_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRFC_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRFC_SEL2_POR_VALUE sc_uint<64>("0b00")
#define PEU_CSR_TLU_PRFC_SEL1_POR_VALUE sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_PRFC_SEL0_POR_VALUE sc_uint<64>("0b00000000")
#define PEU_CSR_TLU_PRF0_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF0_CNT_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF1_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF1_CNT_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF2_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF2_CNT_POR_VALUE  sc_uint<64>("0b00000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_A_POR_VALUE sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_A_BLOCK_POR_VALUE   sc_uint<64>("0b000")
#define PEU_CSR_TLU_DBG_SEL_A_MODULE_POR_VALUE  sc_uint<64>("0b000")
#define PEU_CSR_TLU_DBG_SEL_A_SIGNAL_POR_VALUE  sc_uint<64>("0b000")
#define PEU_CSR_TLU_DBG_SEL_B_POR_VALUE sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_B_BLOCK_POR_VALUE   sc_uint<64>("0b000")
#define PEU_CSR_TLU_DBG_SEL_B_MODULE_POR_VALUE  sc_uint<64>("0b000")
#define PEU_CSR_TLU_DBG_SEL_B_SIGNAL_POR_VALUE  sc_uint<64>("0b000")
#define PEU_CSR_DEV_CAP_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000010")
#define PEU_CSR_DEV_CAP_L1_POR_VALUE    sc_uint<64>("0b000")
#define PEU_CSR_DEV_CAP_L0S_POR_VALUE   sc_uint<64>("0b000")
#define PEU_CSR_DEV_CAP_MPS_POR_VALUE   sc_uint<64>("0b010")
#define PEU_CSR_DEV_CTL_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CTL_MRRS_POR_VALUE  sc_uint<64>("0b000")
#define PEU_CSR_DEV_CTL_MPS_POR_VALUE   sc_uint<64>("0b000")
#define PEU_CSR_DEV_STS_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_STS_TP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LNK_CAP_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000010100110010000001")
#define PEU_CSR_LNK_CAP_PORT_POR_VALUE  sc_uint<64>("0b00000000")
#define PEU_CSR_LNK_CAP_L1_POR_VALUE    sc_uint<64>("0b010")
#define PEU_CSR_LNK_CAP_L0S_POR_VALUE   sc_uint<64>("0b100")
#define PEU_CSR_LNK_CAP_ASPM_POR_VALUE  sc_uint<64>("0b11")
#define PEU_CSR_LNK_CAP_WIDTH_POR_VALUE sc_uint<64>("0b001000")
#define PEU_CSR_LNK_CAP_SPEED_POR_VALUE sc_uint<64>("0b0001")
#define PEU_CSR_LNK_CTL_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CTL_EXTSYNC_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LNK_CTL_CLOCK_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LNK_CTL_RETRAIN_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LNK_CTL_DISABLE_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LNK_CTL_RCB_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_LNK_CTL_ASPM_POR_VALUE  sc_uint<64>("0b00")
#define PEU_CSR_LNK_STS_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_STS_CLOCK_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LNK_STS_TRAIN_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LNK_STS_SPARE_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LNK_STS_WIDTH_POR_VALUE sc_uint<64>("0b000000")
#define PEU_CSR_LNK_STS_SPEED_POR_VALUE sc_uint<64>("0b0000")
#define PEU_CSR_SLT_CAP_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SLT_CAP_SPLS_POR_VALUE  sc_uint<64>("0b00")
#define PEU_CSR_SLT_CAP_SPLV_POR_VALUE  sc_uint<64>("0b00000000")
#define PEU_CSR_UE_LOG_POR_VALUE        sc_uint<64>("0b0000000000000000000000000000000000000000000101111111000000010001")
#define PEU_CSR_UE_LOG_EN_POR_VALUE     sc_uint<64>("0b101111111000000010001")
#define PEU_CSR_UE_INT_EN_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_INT_EN_EN_S_POR_VALUE        sc_uint<64>("0b000000000000000000000")
#define PEU_CSR_UE_INT_EN_EN_P_POR_VALUE        sc_uint<64>("0b000000000000000000000")
#define PEU_CSR_UE_EN_ERR_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_EN_ERR_ERR_S_POR_VALUE       sc_uint<64>("0b000000000000000000000")
#define PEU_CSR_UE_EN_ERR_ERR_P_POR_VALUE       sc_uint<64>("0b000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_UR_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_MFP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_ROF_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_UC_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_SPARE1_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_CTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_FCP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_PP_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_DLP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_SPARE_S_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_UR_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_MFP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_ROF_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_UC_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_SPARE2_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_CTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_FCP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_PP_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_DLP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_SPARE_P_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_UR_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_MFP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_ROF_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_UC_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_SPARE1_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_CTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_FCP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_PP_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_DLP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_SPARE_S_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_UR_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_MFP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_ROF_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_UC_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_SPARE2_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_CTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_FCP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_PP_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_DLP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_SPARE_P_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_RUE_HDR1_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR1_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR2_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR2_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR1_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR1_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR2_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR2_HDR_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_LOG_POR_VALUE        sc_uint<64>("0b0000000000000000000000000000000000000000000000000001000111000001")
#define PEU_CSR_CE_LOG_EN_POR_VALUE     sc_uint<64>("0b1000111000001")
#define PEU_CSR_CE_INT_EN_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_INT_EN_EN_S_POR_VALUE        sc_uint<64>("0b0000000000000")
#define PEU_CSR_CE_INT_EN_EN_P_POR_VALUE        sc_uint<64>("0b0000000000000")
#define PEU_CSR_CE_EN_ERR_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_EN_ERR_ERR_S_POR_VALUE       sc_uint<64>("0b0000000000000")
#define PEU_CSR_CE_EN_ERR_ERR_P_POR_VALUE       sc_uint<64>("0b0000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RNR_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_BDP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_BTP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RE_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RNR_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_BDP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_BTP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_RE_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RTO_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RNR_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_BDP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_BTP_S_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RE_S_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RTO_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RNR_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_BDP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_BTP_P_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_RE_P_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_PEU_DLPL_SERDES_REV_POR_VALUE   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_PEU_DLPL_SERDES_REV_DLPL_ID_POR_VALUE   sc_uint<64>("0b0000")
#define PEU_CSR_PEU_DLPL_SERDES_REV_SERDES_ID_POR_VALUE sc_uint<64>("0b0000")
#define PEU_CSR_ACKNAK_THRESH_POR_VALUE sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000001000011")
#define PEU_CSR_ACKNAK_THRESH_ACK_NAK_THR_POR_VALUE     sc_uint<64>("0b0000000001000011")
#define PEU_CSR_ACKNAK_TIMER_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_TIMER_ACK_NAK_TMR_POR_VALUE      sc_uint<64>("0b0000000000000000")
#define PEU_CSR_REPLAY_TIM_THRESH_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000011111100")
#define PEU_CSR_REPLAY_TIM_THRESH_RPLAY_TMR_THR_POR_VALUE       sc_uint<64>("0b0000000011111100")
#define PEU_CSR_REPLAY_TIMER_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIMER_REPLAY_NUM_POR_VALUE       sc_uint<64>("0b00")
#define PEU_CSR_REPLAY_TIMER_RPLAY_TMR_POR_VALUE        sc_uint<64>("0b0000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_V_MESSAGE_POR_VALUE        sc_uint<64>("0b00000000000000000000000000000000")
#define PEU_CSR_FORCE_LTSSM_POR_VALUE   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_FORCE_LTSSM_FORCE_EN_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_FORCE_LTSSM_FORCED_LTSSM_POR_VALUE      sc_uint<64>("0b00000")
#define PEU_CSR_LINK_CFG_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100000001")
#define PEU_CSR_LINK_CFG_ACK_FREQ_POR_VALUE     sc_uint<64>("0b00000001")
#define PEU_CSR_LINK_CFG_FLOW_CONTROL_DISABLE_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LINK_CFG_SPARE_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_LINK_CFG_OTHER_MESSAGE_REQUEST_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_LINK_CFG_ACK_NAK_DISABLE_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_LINK_CFG_DATA_LINK_ENABLE_POR_VALUE     sc_uint<64>("0b1")
#define PEU_CSR_LINK_CTL_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000110110000100000000000")
#define PEU_CSR_LINK_CTL_LINK_NUM_POR_VALUE     sc_uint<64>("0b00000000")
#define PEU_CSR_LINK_CTL_N_FTS_POR_VALUE        sc_uint<64>("0b00011011")
#define PEU_CSR_LINK_CTL_SPARE_POR_VALUE        sc_uint<64>("0b00")
#define PEU_CSR_LINK_CTL_LINK_CAPABLE_POR_VALUE sc_uint<64>("0b1000")
#define PEU_CSR_LINK_CTL_FAST_LINK_MODE_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LINK_CTL_RX_HIGH_IMP_DIS_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_LINK_CTL_ELASTICAL_BUFFER_DISABLE_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_LINK_CTL_SCRAMBLE_DISABLE_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_LINK_CTL_RESET_ASSERT_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LANE_SKEW_DESKEW_DISABLE_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_SPARE_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_SPARE2_POR_VALUE      sc_uint<64>("0b000000000000000")
#define PEU_CSR_LANE_SKEW_FORCE_RCV_PRESENT_EN_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_7_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_6_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_5_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_4_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_3_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_2_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_1_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_LANE_SKEW_LN_0_RCV_PRESENT_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_SYMBOL_NUM_POR_VALUE    sc_uint<64>("0b0000000000000000000000000000000000000000000000000011001110101010")
#define PEU_CSR_SYMBOL_NUM_SPARE_POR_VALUE      sc_uint<64>("0b011")
#define PEU_CSR_SYMBOL_NUM_SKIP_SYMBOLS_POR_VALUE       sc_uint<64>("0b011")
#define PEU_CSR_SYMBOL_NUM_SPARE2_POR_VALUE     sc_uint<64>("0b1010")
#define PEU_CSR_SYMBOL_NUM_TS1_SYMBOLS_POR_VALUE        sc_uint<64>("0b1010")
#define PEU_CSR_SYMBOL_TIMER_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000010100000000")
#define PEU_CSR_SYMBOL_TIMER_SKIP_INTERVAL_POR_VALUE    sc_uint<64>("0b10100000000")
#define PEU_CSR_CORE_STATUS_POR_VALUE   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000011")
/// Following is temp for power up test
//#define PEU_CSR_CORE_STATUS_POR_VALUE sc_uint<64>("0b0000000000000001000000000000000000000000000011111111000000000111")
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_POR_VALUE      sc_uint<64>("0b000")
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_POR_VALUE      sc_uint<64>("0b00")
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_POR_VALUE    sc_uint<64>("0b00")
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_POR_VALUE       sc_uint<64>("0b00000")
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_POR_VALUE  sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_POR_VALUE       sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_POR_VALUE      sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_POR_VALUE      sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_SDS_READY_1_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_SDS_READY_0_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_LOG_EN_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000001111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_LOG_EN_EN_EVENT_POR_VALUE     sc_uint<64>("0b00001111")
#define PEU_CSR_EVENT_ERR_LOG_EN_EN_ERROR_POR_VALUE     sc_uint<64>("0b111111111111111111")
#define PEU_CSR_EVENT_ERR_INT_EN_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_EN_EN_EVENT_POR_VALUE     sc_uint<64>("0b00000000")
#define PEU_CSR_EVENT_ERR_INT_EN_EN_ERROR_POR_VALUE     sc_uint<64>("0b000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_STS_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_STS_EN_EVENT_POR_VALUE    sc_uint<64>("0b00000000")
#define PEU_CSR_EVENT_ERR_INT_STS_EN_ERROR_POR_VALUE    sc_uint<64>("0b000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_POR_VALUE        sc_uint<64>("0b00000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_POR_VALUE sc_uint<64>("0b00000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_CNT_PRE_POR_VALUE     sc_uint<64>("0b0000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_POR_VALUE     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_POR_VALUE    sc_uint<64>("0b000000")
#define PEU_CSR_SERDES_PLL_POR_VALUE    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_SERDES_PLL_SPARE_POR_VALUE      sc_uint<64>("0b00")
#define PEU_CSR_SERDES_PLL_LB_POR_VALUE sc_uint<64>("0b00")
#define PEU_CSR_SERDES_PLL_MPY_POR_VALUE        sc_uint<64>("0b0001")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_POR_VALUE      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000010101010010")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_BSINRXN_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_BSINRXP_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_EQ_POR_VALUE   sc_uint<64>("0b0001")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_CDR_POR_VALUE  sc_uint<64>("0b010")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_LOS_POR_VALUE  sc_uint<64>("0b10")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_TERM_POR_VALUE sc_uint<64>("0b100")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_POR_VALUE   sc_uint<64>("0b1")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_ENTEST_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_POR_VALUE   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_SYNC_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_POR_VALUE       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000111101100")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_SPARE_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_DE_POR_VALUE    sc_uint<64>("0b0111")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_SWING_POR_VALUE sc_uint<64>("0b101")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_CM_POR_VALUE    sc_uint<64>("0b1")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_INVPAIR_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_ENTEST_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_POR_VALUE    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_RDTCTIP_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_TESTFAIL_POR_VALUE   sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_POR_VALUE sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000011")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_INVPATT_POR_VALUE sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_RATE_POR_VALUE    sc_uint<64>("0b00")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_RESERVED_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_ENBSPT_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_ENBSRX_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_ENBSTX_POR_VALUE  sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_LOOPBACK_POR_VALUE        sc_uint<64>("0b00")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_CLKBYP_POR_VALUE  sc_uint<64>("0b00")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_ENRXPATT_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_ENTXPATT_POR_VALUE        sc_uint<64>("0b0")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_TESTPATT_POR_VALUE        sc_uint<64>("0b11")


#define PEU_CSR_TLU_CTL_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_STS_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000100000000")
#define PEU_CSR_TRN_OFF_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICI_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DIAG_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECC_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECL_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ERB_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICA_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICR_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_LOG_CLEAR_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_INT_EN_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR1_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR2_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR1_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR2_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRFC_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF0_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF1_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF2_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_A_CLEAR_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_B_CLEAR_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CAP_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CTL_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_STS_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CAP_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CTL_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_STS_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SLT_CAP_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_LOG_CLEAR_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_INT_EN_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_EN_ERR_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000000010111111100000001000100000000000101111111000000010001")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR1_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR2_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR1_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR2_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_LOG_CLEAR_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_INT_EN_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_EN_ERR_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000000000000000100011100000100000000000000000001000111000001")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_PEU_DLPL_SERDES_REV_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_THRESH_CLEAR_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_TIMER_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIM_THRESH_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIMER_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_FORCE_LTSSM_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CFG_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CTL_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LANE_SKEW_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_NUM_CLEAR_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_TIMER_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_LOG_EN_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_EN_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_STS_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_CLEAR_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_CLEAR_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_PLL_CLEAR_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_CLEAR_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_CLEAR_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_CLEAR_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_CLEAR_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")

#define PEU_CSR_TLU_CTL_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_STS_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TRN_OFF_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_TLU_ICI_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DIAG_SET_MASK       sc_uint<64>("0b0000000010000000000000000000000000000000000000000000000011110000")
#define PEU_CSR_TLU_ECC_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECL_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ERB_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICA_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICR_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_LOG_SET_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_INT_EN_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_SET_MASK      sc_uint<64>("0b0000000011111111111111111111111100000000111111111111111111111111")
#define PEU_CSR_ROE_HDR1_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR2_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR1_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR2_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRFC_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF0_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF1_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF2_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_A_SET_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_B_SET_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CAP_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CTL_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_STS_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CAP_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CTL_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_STS_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SLT_CAP_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_LOG_SET_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_INT_EN_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_EN_ERR_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_SET_MASK      sc_uint<64>("0b0000000000010111111100000001000100000000000101111111000000010001")
#define PEU_CSR_RUE_HDR1_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR2_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR1_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR2_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_LOG_SET_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_INT_EN_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_EN_ERR_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_SET_MASK      sc_uint<64>("0b0000000000000000000100011100000100000000000000000001000111000001")
#define PEU_CSR_PEU_DLPL_SERDES_REV_SET_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_THRESH_SET_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_TIMER_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIM_THRESH_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIMER_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_FORCE_LTSSM_SET_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CFG_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CTL_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_LANE_SKEW_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_NUM_SET_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_TIMER_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_SET_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_LOG_EN_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_EN_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_STS_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_SET_MASK   sc_uint<64>("0b0000000000000000000000000000000011111111000000111111111111111111")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_SET_MASK      sc_uint<64>("0b0100000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_SET_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_PLL_SET_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_SET_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_SET_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_SET_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_SET_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_SET_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")

#define PEU_CSR_TLU_CTL_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_STS_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TRN_OFF_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICI_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DIAG_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECC_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ECL_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ERB_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICA_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_ICR_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_LOG_TOGGLE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_INT_EN_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_EN_ERR_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1C_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_OE_ERR_RW1S_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR1_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ROE_HDR2_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR1_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TOE_HDR2_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRFC_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF0_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF1_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_PRF2_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_A_TOGGLE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TLU_DBG_SEL_B_TOGGLE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CAP_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_CTL_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_DEV_STS_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CAP_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_CTL_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_STS_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SLT_CAP_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_LOG_TOGGLE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_INT_EN_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_EN_ERR_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1C_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_UE_ERR_RW1S_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR1_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_RUE_HDR2_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR1_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_TUE_HDR2_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_LOG_TOGGLE_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_INT_EN_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_EN_ERR_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1C_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CE_ERR_RW1S_ALIAS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_PEU_DLPL_SERDES_REV_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_THRESH_TOGGLE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_ACKNAK_TIMER_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIM_THRESH_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_REPLAY_TIMER_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_VEN_DLLP_MSG_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_FORCE_LTSSM_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CFG_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LINK_CTL_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LANE_SKEW_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_NUM_TOGGLE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SYMBOL_TIMER_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_LOG_EN_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_EN_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_INT_STS_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1C_ALIAS_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_EVENT_ERR_STS_CLR_RW1S_ALIAS_TOGGLE_MASK        sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_1_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_LNK_BIT_ERR_CNT_2_TOGGLE_MASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_PLL_TOGGLE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_CTL_TOGGLE_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_RECEIVER_LANE_STATUS_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_CTL_TOGGLE_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_XMITTER_LANE_STATUS_TOGGLE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_SERDES_MACRO_TEST_CFG_TOGGLE_MASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")

//-------------------------------------------------------
//----- Variable definitions for register ptl_ctb_tlr_csr_core_status
//-------------------------------------------------------
#define PEU_CSR_CORE_STATUS_WIDTH       64
#define PEU_CSR_CORE_STATUS_DEPTH       1
#define PEU_CSR_CORE_STATUS_SLC (63,0)
#define PEU_CSR_CORE_STATUS_INT_SLC     (63,0)
#define PEU_CSR_CORE_STATUS_POSITION    0
#define PEU_CSR_CORE_STATUS_LOW_ADDR_WIDTH      0
#define PEU_CSR_CORE_STATUS_ADDR_RANGE  (26,0)
#define PEU_CSR_CORE_STATUS_READ_MASK   sc_uint<64>("0b0000011111110011111111111111111111111111111111111111111111111111")
#define PEU_CSR_CORE_STATUS_READ_ONLY_MASK      sc_uint<64>("0b0000011111110011111111111111111111111111111111111111111111111111")
#define PEU_CSR_CORE_STATUS_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_WRITE_ONLY_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_SET_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RMASK       sc_uint<64>("0b0000011111110011111111111111111111111111111111111111111111111111")
#define PEU_CSR_CORE_STATUS_RESERVED_BIT_MASK   sc_uint<64>("0b1111100000001100000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_HW_LD_MASK  sc_uint<64>("0b0000011111110011111111111111111111111111111111111111111111111111")
#define PEU_CSR_CORE_STATUS_INTERNAL_REG        1
#define PEU_CSR_CORE_STATUS_ZERO_TIME_OMNI      1
#define PEU_CSR_CORE_STATUS_NUM_FIELDS  14
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_FID    0
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_SLC    (58,56)
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_WIDTH  3
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_INT_SLC        (2,0)
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_POSITION       56
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_FMASK  sc_uint<64>("0b0000011100000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_HW_LD_MASK     sc_uint<64>("0b0000011100000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_TX_LOS_STATE_POR_VALUE      sc_uint<64>("0b000")
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_FID    1
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_SLC    (55,54)
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_WIDTH  2
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_INT_SLC        (1,0)
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_POSITION       54
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_FMASK  sc_uint<64>("0b0000000011000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_HW_LD_MASK     sc_uint<64>("0b0000000011000000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RV_LOS_STATE_POR_VALUE      sc_uint<64>("0b00")
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_FID  2
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_SLC  (53,52)
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_WIDTH        2
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_INT_SLC      (1,0)
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_POSITION     52
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_FMASK        sc_uint<64>("0b0000000000110000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_HW_LD_MASK   sc_uint<64>("0b0000000000110000000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_INT_FCSM_STATE_POR_VALUE    sc_uint<64>("0b00")
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_FID  3
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_SLC  [49]
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_WIDTH        1
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_INT_SLC      [0]
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_POSITION     49
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_FMASK        sc_uint<64>("0b0000000000000010000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_HW_LD_MASK   sc_uint<64>("0b0000000000000010000000000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RBUF_NOT_EMPTY_POR_VALUE    sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_FID     4
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_SLC     (48,44)
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_WIDTH   5
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_INT_SLC (4,0)
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_POSITION        44
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_FMASK   sc_uint<64>("0b0000000000000001111100000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_HW_LD_MASK      sc_uint<64>("0b0000000000000001111100000000000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_LTSSM_STATE_POR_VALUE       sc_uint<64>("0b00000")
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_FID        5
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_SLC        (43,36)
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_WIDTH      8
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_INT_SLC    (7,0)
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_POSITION   36
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_FMASK      sc_uint<64>("0b0000000000000000000011111111000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_HW_LD_MASK sc_uint<64>("0b0000000000000000000011111111000000000000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_POLARITY_REV_POR_VALUE  sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_FID     6
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_SLC     (35,28)
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_WIDTH   8
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_INT_SLC (7,0)
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_POSITION        28
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_FMASK   sc_uint<64>("0b0000000000000000000000000000111111110000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_HW_LD_MASK      sc_uint<64>("0b0000000000000000000000000000111111110000000000000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_FTS_NUM_POR_VALUE       sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_FID    7
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_SLC    (27,20)
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_WIDTH  8
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_INT_SLC        (7,0)
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_POSITION       20
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_FMASK  sc_uint<64>("0b0000000000000000000000000000000000001111111100000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_HW_LD_MASK     sc_uint<64>("0b0000000000000000000000000000000000001111111100000000000000000000")
#define PEU_CSR_CORE_STATUS_RCV_LINK_NUM_POR_VALUE      sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_FID    8
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_SLC    (19,12)
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_WIDTH  8
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_INT_SLC        (7,0)
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_POSITION       12
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_FMASK  sc_uint<64>("0b0000000000000000000000000000000000000000000011111111000000000000")
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_HW_LD_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000011111111000000000000")
#define PEU_CSR_CORE_STATUS_PCS_LOCK_STS_POR_VALUE      sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_FID 9
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_SLC (11,4)
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_WIDTH       8
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_INT_SLC     (7,0)
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_POSITION    4
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_FMASK       sc_uint<64>("0b0000000000000000000000000000000000000000000000000000111111110000")
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_HW_LD_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000111111110000")
#define PEU_CSR_CORE_STATUS_RCVR_DETECT_STS_POR_VALUE   sc_uint<64>("0b00000000")
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_FID    10
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_SLC    [3]
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_WIDTH  1
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_INT_SLC        [0]
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_POSITION       3
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_FMASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000001000")
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_HW_LD_MASK     sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000001000")
#define PEU_CSR_CORE_STATUS_PCS_LANE_REV_POR_VALUE      sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_FID   11
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_SLC   [2]
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_WIDTH 1
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_INT_SLC       [0]
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_POSITION      2
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_FMASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000100")
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_HW_LD_MASK    sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000100")
#define PEU_CSR_CORE_STATUS_PCS_ALIGN_STS_POR_VALUE     sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_SDS_READY_1_FID     12
#define PEU_CSR_CORE_STATUS_SDS_READY_1_SLC     [1]
#define PEU_CSR_CORE_STATUS_SDS_READY_1_WIDTH   1
#define PEU_CSR_CORE_STATUS_SDS_READY_1_INT_SLC [0]
#define PEU_CSR_CORE_STATUS_SDS_READY_1_POSITION        1
#define PEU_CSR_CORE_STATUS_SDS_READY_1_FMASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000010")
#define PEU_CSR_CORE_STATUS_SDS_READY_1_HW_LD_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000010")
#define PEU_CSR_CORE_STATUS_SDS_READY_1_POR_VALUE       sc_uint<64>("0b0")
#define PEU_CSR_CORE_STATUS_SDS_READY_0_FID     13
#define PEU_CSR_CORE_STATUS_SDS_READY_0_SLC     [0]
#define PEU_CSR_CORE_STATUS_SDS_READY_0_WIDTH   1
#define PEU_CSR_CORE_STATUS_SDS_READY_0_INT_SLC [0]
#define PEU_CSR_CORE_STATUS_SDS_READY_0_POSITION        0
#define PEU_CSR_CORE_STATUS_SDS_READY_0_FMASK   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_CORE_STATUS_SDS_READY_0_HW_LD_MASK      sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")
#define PEU_CSR_CORE_STATUS_SDS_READY_0_POR_VALUE       sc_uint<64>("0b0")

#define PEU_CSR_MACL_PCS_RESET_FMASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000001")

#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_HW_ADDR     sc_uint<64>("0b0000000000000000000000000000000000000000000011001010001000000100")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_READ_MASK   sc_uint<64>("0b0000000000000000000000001111000000000000000000000000000011110000")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_WRITE_MASK  sc_uint<64>("0b0000000000000000000000001111000000000000000000000000000011110000")
//#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_WRITE_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_CLEAR_MASK  sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SET_MASK    sc_uint<64>("0b0000000000000000000000001111000000000000000000000000000011110000")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_TOGGLE_MASK sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")
#define ILU_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_POR_VALUE   sc_uint<64>("0b0000000000000000000000000000000000000000000000000000000000000000")


#define CHC 59,52
#define CDC 51,40
#define NHC 39,32
#define NDC 31,20
#define PHC     19,12
#define PDC 11,0
#define CHI 62
#define NHI 61
#define PHI 60

#endif // INC_peu_csr_defines_hpp__