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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / common / src / hcall_vpci.s
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920dae64
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: hcall_vpci.s
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49 .ident "@(#)hcall_vpci.s 1.8 07/07/17 SMI"
50
51#include <sys/asm_linkage.h>
52#include <hypervisor.h>
53#include <sparcv9/misc.h>
54#include <asi.h>
55#include <hprivregs.h>
56#include <vdev_intr.h>
57#include <offsets.h>
58#include <guest.h>
59#include <util.h>
60
61#define CHECK_PCIE_BDF(device, scr1) \
62 set PCIE_BDF_MASK, scr1 ;\
63 andncc device, scr1, %g0 ;\
64 bnz,pn %xcc, herr_inval ;\
65 nop
66
67#define CHECK_PCIE_CFG_OFFSET(offset, scr1) \
68 set PCIE_CFG_OFFSET_MASK, scr1 ;\
69 andncc offset, scr1, %g0 ;\
70 bnz,pn %xcc, herr_inval ;\
71 nop
72
73#define CHECK_OFFSET_SIZE_ALIGN(offset, size, max_size, scr1) \
74 brz,pn size, herr_inval ;\
75 sub size, 1, scr1 ;\
76 btst scr1, size ;\
77 /* Check for power two size */ ;\
78 bnz,pn %xcc, herr_inval ;\
79 .empty ;\
80 cmp size, max_size ;\
81 /* Check for size > max_size */ ;\
82 bgu,pn %xcc, herr_inval ;\
83 .empty ;\
84 /* Check for offset aligned on size */ ;\
85 btst offset, scr1 ;\
86 bnz,pn %xcc, herr_badalign ;\
87 .empty
88
89/*
90 * Return code template
91 */
92 ENTRY_NP(hcall_vpci_iommu_map)
93 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_MAP, %g1, %g2, %g3, herr_inval)
94 SET_SIZE(hcall_vpci_iommu_map)
95
96 ENTRY_NP(hcall_vpci_iommu_map_v2)
97 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_MAP_V2, %g1, %g2, %g3, herr_inval)
98 SET_SIZE(hcall_vpci_iommu_map_v2)
99 ENTRY_NP(hcall_vpci_iommu_getmap_v2)
100 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_GETMAP_V2, %g1, %g2, %g3, herr_inval)
101 SET_SIZE(hcall_vpci_iommu_getmap_v2)
102
103 ENTRY_NP(hcall_vpci_iommu_getmap)
104 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_GETMAP, %g1, %g2, %g3, herr_inval)
105 SET_SIZE(hcall_vpci_iommu_getmap)
106
107 ENTRY_NP(hcall_vpci_iommu_unmap)
108 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_UNMAP, %g1, %g2, %g3, herr_inval)
109 SET_SIZE(hcall_vpci_iommu_unmap)
110
111 ENTRY_NP(hcall_vpci_iommu_getbypass)
112 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_GETBYPASS, %g1, %g2, %g3, herr_inval)
113 SET_SIZE(hcall_vpci_iommu_getbypass)
114
115/*
116 * config_get
117 *
118 * arg0 dev config pa (%o0)
119 * arg1 PCI device (%o1)
120 * arg2 offset (%o2)
121 * arg3 size (%o3)
122 * --
123 * ret0 status (%o0)
124 * ret1 error_flag (%o1)
125 * ret2 value (%o2)
126 */
127 ENTRY_NP(hcall_vpci_config_get)
128 CHECK_PCIE_BDF(%o1, %g2)
129 CHECK_PCIE_CFG_OFFSET(%o2, %g2)
130 CHECK_OFFSET_SIZE_ALIGN(%o2, %o3, SZ_WORD, %g2)
131 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_CONFIGGET, %g1, %g2, %g3, herr_inval)
132 SET_SIZE(hcall_vpci_config_get)
133
134/*
135 * config_put
136 *
137 * arg0 dev config pa (%o0)
138 * arg1 PCI device (%o1)
139 * arg2 offset (%o2)
140 * arg3 size (%o3)
141 * arg4 data (%o4)
142 * --
143 * ret0 status (%o0)
144 */
145 ENTRY_NP(hcall_vpci_config_put)
146 CHECK_PCIE_BDF(%o1, %g2)
147 CHECK_PCIE_CFG_OFFSET(%o2, %g2)
148 CHECK_OFFSET_SIZE_ALIGN(%o2, %o3, SZ_WORD, %g2)
149 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_CONFIGPUT, %g1, %g2, %g3, herr_inval)
150 SET_SIZE(hcall_vpci_config_put)
151
152/*
153 * io_peek
154 *
155 * %g1 = PIU Cookie Pointer
156 * arg0 devhandle (%o0)
157 * arg1 r_addr (%o1)
158 * arg2 size (%o2)
159 * --
160 * ret0 status (%o0)
161 * ret1 error? (%o1)
162 * ret2 data (%o2)
163 */
164 ENTRY_NP(hcall_vpci_io_peek)
165 CHECK_OFFSET_SIZE_ALIGN(%o1, %o2, SZ_LONG, %g2)
166 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_IOPEEK, %g1, %g2, %g3, herr_inval)
167 SET_SIZE(hcall_vpci_io_peek)
168
169/*
170 * io_poke
171 *
172 * %g1 = PIU Cookie Pointer
173 * arg0 devhandle (%o0)
174 * arg1 r_addr (%o1)
175 * arg2 size (%o2)
176 * arg3 data (%o3)
177 * arg4 PCI device (%o4)
178 * --
179 * ret0 status (%o0)
180 * ret1 error? (%o1)
181 */
182 ENTRY_NP(hcall_vpci_io_poke)
183 CHECK_PCIE_BDF(%o4, %g2)
184 CHECK_OFFSET_SIZE_ALIGN(%o1, %o2, SZ_LONG, %g2)
185 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_IOPOKE, %g1, %g2, %g3, herr_inval)
186 SET_SIZE(hcall_vpci_io_poke)
187
188/*
189 * dma_sync
190 *
191 * %g1 = Fire Cookie Pointer
192 * arg0 devhandle (%o0)
193 * arg1 r_addr (%o1)
194 * arg2 size (%o2)
195 * arg3 direction (%o3) (one or both of 1: for device 2: for cpu)
196 * --
197 * ret0 status (%o0)
198 * ret1 #bytes synced (%o1)
199 */
200 ENTRY_NP(hcall_vpci_dma_sync)
201 brz,pn %o3, herr_inval
202 andncc %o3, (HVIO_DMA_SYNC_CPU | HVIO_DMA_SYNC_DEVICE), %g0
203 bnz,pn %xcc, herr_inval
204 nop
205 brz,pn %o2, herr_inval
206 .empty
207 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_DMASYNC, %g1, %g2, %g3, herr_inval)
208 SET_SIZE(hcall_vpci_dma_sync)
209
210 ENTRY_NP(hcall_vpci_get_perfreg)
211 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_GETPERFREG, %g1, %g2, %g3, herr_inval)
212 SET_SIZE(hcall_vpci_get_perfreg)
213
214 ENTRY_NP(hcall_vpci_set_perfreg)
215 JMPL_DEVHANDLE2DEVOP(%o0, DEVOPSVEC_SETPERFREG, %g1, %g2, %g3, herr_inval)
216 SET_SIZE(hcall_vpci_set_perfreg)
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.