projects / OpenSPARC-T2-SAM / blame
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1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * Hypervisor Software File: asi.h | |
| 5 | * | |
| 6 | * Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 7 | * | |
| 8 | * - Do no alter or remove copyright notices | |
| 9 | * | |
| 10 | * - Redistribution and use of this software in source and binary forms, with | |
| 11 | * or without modification, are permitted provided that the following | |
| 12 | * conditions are met: | |
| 13 | * | |
| 14 | * - Redistribution of source code must retain the above copyright notice, | |
| 15 | * this list of conditions and the following disclaimer. | |
| 16 | * | |
| 17 | * - Redistribution in binary form must reproduce the above copyright notice, | |
| 18 | * this list of conditions and the following disclaimer in the | |
| 19 | * documentation and/or other materials provided with the distribution. | |
| 20 | * | |
| 21 | * Neither the name of Sun Microsystems, Inc. or the names of contributors | |
| 22 | * may be used to endorse or promote products derived from this software | |
| 23 | * without specific prior written permission. | |
| 24 | * | |
| 25 | * This software is provided "AS IS," without a warranty of any kind. | |
| 26 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, | |
| 27 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A | |
| 28 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN | |
| 29 | * MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR | |
| 30 | * ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR | |
| 31 | * DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN | |
| 32 | * OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR | |
| 33 | * FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE | |
| 34 | * DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, | |
| 35 | * ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF | |
| 36 | * SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. | |
| 37 | * | |
| 38 | * You acknowledge that this software is not designed, licensed or | |
| 39 | * intended for use in the design, construction, operation or maintenance of | |
| 40 | * any nuclear facility. | |
| 41 | * | |
| 42 | * ========== Copyright Header End ============================================ | |
| 43 | */ | |
| 44 | /* | |
| 45 | * Copyright 2007 Sun Microsystems, Inc. All rights reserved. | |
| 46 | * Use is subject to license terms. | |
| 47 | */ | |
| 48 | ||
| 49 | #ifndef _PLATFORM_ASI_H | |
| 50 | #define _PLATFORM_ASI_H | |
| 51 | ||
| 52 | #pragma ident "@(#)asi.h 1.4 07/07/17 SMI" | |
| 53 | ||
| 54 | /* | |
| 55 | * Niagara2 ASI definitions | |
| 56 | */ | |
| 57 | ||
| 58 | #ifdef __cplusplus | |
| 59 | extern "C" { | |
| 60 | #endif | |
| 61 | ||
| 62 | #define ASI_ERR_EN 0x4c | |
| 63 | #define CORE_ERR_REPORT_EN 0x10 | |
| 64 | #define CORE_ERR_TRAP_EN 0x18 | |
| 65 | ||
| 66 | #define ASI_MMU_HWTW 0x52 /* MMU HWTW real range and phys offset regs */ | |
| 67 | #define ASI_MMU_TSB 0x54 /* MMU TSB registers */ | |
| 68 | #define ASI_MMU_CFG 0x58 /* MMU configuration register */ | |
| 69 | ||
| 70 | #define ASI_SPU_CWQ_HEAD 0x0 /* SPU CWQ Head pointer */ | |
| 71 | #define ASI_SPU_CWQ_TAIL 0x8 /* SPU CWQ Tail pointer */ | |
| 72 | #define ASI_SPU_CWQ_FIRST 0x10 /* SPU CWQ First pointer */ | |
| 73 | #define ASI_SPU_CWQ_LAST 0x18 /* SPU CWQ Last pointer */ | |
| 74 | #define ASI_SPU_CWQ_CSR 0x20 /* SPU CWQ CSR register */ | |
| 75 | #define ASI_SPU_CWQ_CSR_ENABLE 0x28 /* SPU CWQ CSR bit 0 only */ | |
| 76 | #define ASI_SPU_CWQ_SYNC 0x30 /* SPU CWQ Sync register */ | |
| 77 | ||
| 78 | #define ASI_CMP_CHIP 0x41 /* per-chip CMP registers */ | |
| 79 | #define CMP_CORE_ENABLE_STATUS 0x10 | |
| 80 | #define CMP_TICK_ENABLE 0x38 | |
| 81 | #define CMP_CORE_RUNNING_STATUS 0x58 | |
| 82 | #define CMP_CORE_RUNNING_W1S 0x60 | |
| 83 | #define CMP_CORE_RUNNING_W1C 0x68 | |
| 84 | #define ASI_CMP_CORE 0x63 /* per-core (local) CMP registers */ | |
| 85 | #define CMP_CORE_ID 0x10 | |
| 86 | ||
| 87 | #define ASI_DCACHE_DATA 0x46 | |
| 88 | #define ASI_DCACHE_TAG 0x47 | |
| 89 | ||
| 90 | #define ASI_ITLB_PROBE 0x53 | |
| 91 | ||
| 92 | #ifdef __cplusplus | |
| 93 | } | |
| 94 | #endif | |
| 95 | ||
| 96 | #endif /* _PLATFORM_ASI_H */ |