[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / ontario / include / jbi_regs.h

/*
* ========== Copyright Header Begin ==========================================
*
* Hypervisor Software File: jbi_regs.h
* 
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* 
*  - Do no alter or remove copyright notices
* 
*  - Redistribution and use of this software in source and binary forms, with 
*    or without modification, are permitted provided that the following 
*    conditions are met: 
* 
*  - Redistribution of source code must retain the above copyright notice, 
*    this list of conditions and the following disclaimer.
* 
*  - Redistribution in binary form must reproduce the above copyright notice,
*    this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution. 
* 
*    Neither the name of Sun Microsystems, Inc. or the names of contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
*     This software is provided "AS IS," without a warranty of any kind. 
* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, 
* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A 
* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN 
* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR 
* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR 
* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN 
* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR 
* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE 
* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, 
* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF 
* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* 
* You acknowledge that this software is not designed, licensed or
* intended for use in the design, construction, operation or maintenance of
* any nuclear facility. 
* 
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

#ifndef _NIAGARA_JBI_REGS_H
#define	_NIAGARA_JBI_REGS_H

#pragma ident	"@(#)jbi_regs.h	1.11	07/01/24 SMI"

#ifdef __cplusplus
extern "C" {
#endif

#define	JBI_BASE		0x8000000000

#define	JBI_CONFIG1		JBI_BASE
#define	JBI_CONFIG2		(JBI_BASE + 0x00008)

#define	JBI_DEBUG		(JBI_BASE + 0x04000)
#define	JBI_DEBUG_ARB		(JBI_BASE + 0x04100)
#define	JBI_ERR_INJECT		(JBI_BASE + 0x04800)

#define	JBI_ERR_CONFIG		(JBI_BASE + 0x10000)
#define	JBI_ERR_LOG		(JBI_BASE + 0x10020)
#define	JBI_ERR_OVF		(JBI_BASE + 0x10028)
#define	JBI_LOG_ENB		(JBI_BASE + 0x10030)
#define	JBI_SIG_ENB		(JBI_BASE + 0x10038)
#define	JBI_LOG_ADDR		(JBI_BASE + 0x10040)
#define	JBI_LOG_DATA0		(JBI_BASE + 0x10050)
#define	JBI_LOG_DATA1		(JBI_BASE + 0x10058)
#define	JBI_LOG_CTRL		(JBI_BASE + 0x10048)
#define	JBI_LOG_PAR		(JBI_BASE + 0x10060)
#define	JBI_LOG_NACK		(JBI_BASE + 0x10070)
#define	JBI_LOG_ARB		(JBI_BASE + 0x10078)
#define	JBI_L2_TIMEOUT		(JBI_BASE + 0x10080)
#define	JBI_ARB_TIMEOUT		(JBI_BASE + 0x10088)
#define	JBI_TRANS_TIMEOUT	(JBI_BASE + 0x10090)
#define	JBI_INTR_TIMEOUT	(JBI_BASE + 0x10098)
#define	JBI_MEMSIZE		(JBI_BASE + 0x100a0)

#define	JBI_PERF_CTL		(JBI_BASE + 0x20000)
#define	JBI_PERF_COUNT		(JBI_BASE + 0x20008)

/* JBI_ERR_LOG bits */
#define	JBI_APAR		(1 << 28)
#define	JBI_CPAR		(1 << 27)
#define	JBI_ADTYPE		(1 << 26)
#define	JBI_L2_TO		(1 << 25)
#define	JBI_ARB_TO		(1 << 24)
#define	JBI_FATAL_MASK		0x2
#define	JBI_FATAL		(1 << 16)
#define	JBI_DPAR_WR		(1 << 15)
#define	JBI_DPAR_RD		(1 << 14)
#define	JBI_DPAR_O		(1 << 13)
#define	JBI_REP_UE		(1 << 12)
#define	JBI_ILLEGAL		(1 << 11)
#define	JBI_UNSUPP		(1 << 10)
#define	JBI_NONEX_WR		(1 << 9)
#define	JBI_NONEX_RD		(1 << 8)
#define	JBI_READ_TO		(1 << 5)
#define	JBI_UNMAP_WR		(1 << 4)
#define	JBI_RSVD4		(1 << 3)
#define	JBI_ERR_CYCLE		(1 << 2)
#define	JBI_UNEXP_DR		(1 << 1)
#define	JBI_INTR_TO		(1 << 0)

/*
 * JBUS Performance Counter Select Encodings
 */
#define	JBI_PERF1_EVT_OFF	0x00
#define	JBI_PERF1_EVT_CYCLES	0x10

#define	JBI_PERF2_EVT_OFF	0x00
#define	JBI_PERF2_EVT_CYCLES	0x01


/* BEGIN CSTYLED */

/*
 * JBI_MEMSIZE register
 * +----------------------------------------------+
 * | RSVD [63:38] | MEMSIZE [37:30] | RSVD [29:0] |
 * +----------------------------------------------+
 *
 * MEMSIZE[37:30] is the memory size in GB.
 * Note: GB == (1 << 30) so just ensure the RSVD bits are clear
 * to get the memory size in bytes.
 */
#define	JBI_MEMSIZE_SHIFT	30
#define	JBI_MEMSIZE_MASK	0xFF
#define JBI_MEMSIZE_BYTES(reg)				\
	srlx	reg, JBI_MEMSIZE_SHIFT, reg		;\
	and	reg, JBI_MEMSIZE_MASK, reg		;\
	sllx	reg, JBI_MEMSIZE_SHIFT, reg

/*
 * These JBI errors have not been initialised before startup. The HV must
 * enable them.
 */
#define	JBI_INTR_ONLY_ERRS	(JBI_DPAR_WR | JBI_REP_UE | JBI_ILLEGAL | \
				JBI_UNSUPP | JBI_NONEX_WR | JBI_UNMAP_WR | \
				JBI_UNEXP_DR)

#define	JBI_ABORT_ERRS	\
	(JBI_UNEXP_DR | JBI_NONEX_WR | JBI_NONEX_RD |   \
	    JBI_ILLEGAL | JBI_UNSUPP | JBI_UNMAP_WR)


#define	ENABLE_JBI_INTR_ERRS(jbi_errors, reg2, reg3)			\
	setx	JBI_LOG_ENB, reg2, reg3					;\
	ldx	[reg3], reg2						;\
	or	jbi_errors, reg2, reg2					;\
	stx	reg2, [reg3]						;\
	setx	JBI_SIG_ENB, reg2, reg3					;\
	ldx	[reg3], reg2						;\
	or	jbi_errors, reg2, reg2					;\
	stx	reg2, [reg3]


/* END CSTYLED */

#ifdef __cplusplus
}
#endif

#endif /* _NIAGARA_JBI_REGS_H */
Commit	Line	Data
920dae64 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* Hypervisor Software File: jbi_regs.h
	5	*
	6	* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
	7	*
	8	* - Do no alter or remove copyright notices
	9	*
	10	* - Redistribution and use of this software in source and binary forms, with
	11	* or without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistribution of source code must retain the above copyright notice,
	15	* this list of conditions and the following disclaimer.
	16	*
	17	* - Redistribution in binary form must reproduce the above copyright notice,
	18	* this list of conditions and the following disclaimer in the
	19	* documentation and/or other materials provided with the distribution.
	20	*
	21	* Neither the name of Sun Microsystems, Inc. or the names of contributors
	22	* may be used to endorse or promote products derived from this software
	23	* without specific prior written permission.
	24	*
	25	* This software is provided "AS IS," without a warranty of any kind.
	26	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
	27	* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
	28	* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
	29	* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
	30	* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
	31	* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
	32	* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
	33	* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
	34	* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
	35	* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
	36	* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
	37	*
	38	* You acknowledge that this software is not designed, licensed or
	39	* intended for use in the design, construction, operation or maintenance of
	40	* any nuclear facility.
	41	*
	42	* ========== Copyright Header End ============================================
	43	*/
	44	/*
	45	* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
	46	* Use is subject to license terms.
	47	*/
	48
	49	#ifndef _NIAGARA_JBI_REGS_H
	50	#define _NIAGARA_JBI_REGS_H
	51
	52	#pragma ident "@(#)jbi_regs.h 1.11 07/01/24 SMI"
	53
	54	#ifdef __cplusplus
	55	extern "C" {
	56	#endif
	57
	58	#define JBI_BASE 0x8000000000
	59
	60	#define JBI_CONFIG1 JBI_BASE
	61	#define JBI_CONFIG2 (JBI_BASE + 0x00008)
	62
	63	#define JBI_DEBUG (JBI_BASE + 0x04000)
	64	#define JBI_DEBUG_ARB (JBI_BASE + 0x04100)
65	#define JBI_ERR_INJECT (JBI_BASE + 0x04800)
66
67	#define JBI_ERR_CONFIG (JBI_BASE + 0x10000)
68	#define JBI_ERR_LOG (JBI_BASE + 0x10020)
69	#define JBI_ERR_OVF (JBI_BASE + 0x10028)
70	#define JBI_LOG_ENB (JBI_BASE + 0x10030)
71	#define JBI_SIG_ENB (JBI_BASE + 0x10038)
72	#define JBI_LOG_ADDR (JBI_BASE + 0x10040)
73	#define JBI_LOG_DATA0 (JBI_BASE + 0x10050)
74	#define JBI_LOG_DATA1 (JBI_BASE + 0x10058)
75	#define JBI_LOG_CTRL (JBI_BASE + 0x10048)
76	#define JBI_LOG_PAR (JBI_BASE + 0x10060)
77	#define JBI_LOG_NACK (JBI_BASE + 0x10070)
78	#define JBI_LOG_ARB (JBI_BASE + 0x10078)
79	#define JBI_L2_TIMEOUT (JBI_BASE + 0x10080)
80	#define JBI_ARB_TIMEOUT (JBI_BASE + 0x10088)
81	#define JBI_TRANS_TIMEOUT (JBI_BASE + 0x10090)
82	#define JBI_INTR_TIMEOUT (JBI_BASE + 0x10098)
83	#define JBI_MEMSIZE (JBI_BASE + 0x100a0)
84
85	#define JBI_PERF_CTL (JBI_BASE + 0x20000)
86	#define JBI_PERF_COUNT (JBI_BASE + 0x20008)
87
88	/* JBI_ERR_LOG bits */
89	#define JBI_APAR (1 << 28)
90	#define JBI_CPAR (1 << 27)
91	#define JBI_ADTYPE (1 << 26)
92	#define JBI_L2_TO (1 << 25)
93	#define JBI_ARB_TO (1 << 24)
94	#define JBI_FATAL_MASK 0x2
95	#define JBI_FATAL (1 << 16)
96	#define JBI_DPAR_WR (1 << 15)
97	#define JBI_DPAR_RD (1 << 14)
98	#define JBI_DPAR_O (1 << 13)
99	#define JBI_REP_UE (1 << 12)
100	#define JBI_ILLEGAL (1 << 11)
101	#define JBI_UNSUPP (1 << 10)
102	#define JBI_NONEX_WR (1 << 9)
103	#define JBI_NONEX_RD (1 << 8)
104	#define JBI_READ_TO (1 << 5)
105	#define JBI_UNMAP_WR (1 << 4)
106	#define JBI_RSVD4 (1 << 3)
107	#define JBI_ERR_CYCLE (1 << 2)
108	#define JBI_UNEXP_DR (1 << 1)
109	#define JBI_INTR_TO (1 << 0)
110
111	/*
112	* JBUS Performance Counter Select Encodings
113	*/
114	#define JBI_PERF1_EVT_OFF 0x00
115	#define JBI_PERF1_EVT_CYCLES 0x10
116
117	#define JBI_PERF2_EVT_OFF 0x00
118	#define JBI_PERF2_EVT_CYCLES 0x01
119
120
121	/* BEGIN CSTYLED */
122
123	/*
124	* JBI_MEMSIZE register
125	* +----------------------------------------------+
126	* \| RSVD [63:38] \| MEMSIZE [37:30] \| RSVD [29:0] \|
127	* +----------------------------------------------+
128	*
129	* MEMSIZE[37:30] is the memory size in GB.
130	* Note: GB == (1 << 30) so just ensure the RSVD bits are clear
131	* to get the memory size in bytes.
132	*/
133	#define JBI_MEMSIZE_SHIFT 30
134	#define JBI_MEMSIZE_MASK 0xFF
135	#define JBI_MEMSIZE_BYTES(reg) \
136	srlx reg, JBI_MEMSIZE_SHIFT, reg ;\
137	and reg, JBI_MEMSIZE_MASK, reg ;\
138	sllx reg, JBI_MEMSIZE_SHIFT, reg
139
140	/*
141	* These JBI errors have not been initialised before startup. The HV must
142	* enable them.
143	*/
144	#define JBI_INTR_ONLY_ERRS (JBI_DPAR_WR \| JBI_REP_UE \| JBI_ILLEGAL \| \
145	JBI_UNSUPP \| JBI_NONEX_WR \| JBI_UNMAP_WR \| \
146	JBI_UNEXP_DR)
147
148	#define JBI_ABORT_ERRS \
149	(JBI_UNEXP_DR \| JBI_NONEX_WR \| JBI_NONEX_RD \| \
150	JBI_ILLEGAL \| JBI_UNSUPP \| JBI_UNMAP_WR)
151
152
153	#define ENABLE_JBI_INTR_ERRS(jbi_errors, reg2, reg3) \
154	setx JBI_LOG_ENB, reg2, reg3 ;\
155	ldx [reg3], reg2 ;\
156	or jbi_errors, reg2, reg2 ;\
157	stx reg2, [reg3] ;\
158	setx JBI_SIG_ENB, reg2, reg3 ;\
159	ldx [reg3], reg2 ;\
160	or jbi_errors, reg2, reg2 ;\
161	stx reg2, [reg3]
162
163
164	/* END CSTYLED */
165
166	#ifdef __cplusplus
167	}
168	#endif
169
170	#endif /* _NIAGARA_JBI_REGS_H */