Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / ontario / include / mmustat.h
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* Hypervisor Software File: mmustat.h
5*
6* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
7*
8* - Do no alter or remove copyright notices
9*
10* - Redistribution and use of this software in source and binary forms, with
11* or without modification, are permitted provided that the following
12* conditions are met:
13*
14* - Redistribution of source code must retain the above copyright notice,
15* this list of conditions and the following disclaimer.
16*
17* - Redistribution in binary form must reproduce the above copyright notice,
18* this list of conditions and the following disclaimer in the
19* documentation and/or other materials provided with the distribution.
20*
21* Neither the name of Sun Microsystems, Inc. or the names of contributors
22* may be used to endorse or promote products derived from this software
23* without specific prior written permission.
24*
25* This software is provided "AS IS," without a warranty of any kind.
26* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
27* INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
28* PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. SUN
29* MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE FOR
30* ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING OR
31* DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL SUN
32* OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR
33* FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE
34* DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY,
35* ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, EVEN IF
36* SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
37*
38* You acknowledge that this software is not designed, licensed or
39* intended for use in the design, construction, operation or maintenance of
40* any nuclear facility.
41*
42* ========== Copyright Header End ============================================
43*/
44/*
45 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
46 * Use is subject to license terms.
47 */
48
49#ifndef _MMUSTAT_H
50#define _MMUSTAT_H
51
52#pragma ident "@(#)mmustat.h 1.3 05/08/23 SMI"
53
54#ifdef __cplusplus
55extern "C" {
56#endif
57
58/*
59
60 MMU statistic buffer format
61
62 offset (bytes) size (bytes) field
63 -------------- ------------ -----
64 0x0 0x8 IMMU TSB hits ctx0, 8kb TTE
65 0x8 0x8 IMMU TSB %tick's ctx0, 8kb TTE
66 0x10 0x8 IMMU TSB hits ctx0, 64kb TTE
67 0x18 0x8 IMMU TSB %tick's ctx0, 64kb TTE
68 0x20 0x10 reserved
69 0x30 0x8 IMMU TSB hits ctx0, 4mb TTE
70 0x38 0x8 IMMU TSB %tick's ctx0, 4mb TTE
71 0x40 0x10 reserved
72 0x50 0x8 IMMU TSB hits ctx0, 256mb TTE
73 0x58 0x8 IMMU TSB %tick's ctx0, 256mb TTE
74 0x60 0x20 reserved
75 0x80 0x8 IMMU TSB hits ctxnon0, 8kb TTE
76 0x88 0x8 IMMU TSB %tick's ctxnon0, 8kb TTE
77 0x90 0x8 IMMU TSB hits ctxnon0, 64kb TTE
78 0x98 0x8 IMMU TSB %tick's ctxnon0, 64kb TTE
79 0xA0 0x10 reserved
80 0xB0 0x8 IMMU TSB hits ctxnon0, 4mb TTE
81 0xB8 0x8 IMMU TSB %tick's ctxnon0, 4mb TTE
82 0xC0 0x10 reserved
83 0xD0 0x8 IMMU TSB hits ctxnon0, 256mb TTE
84 0xD8 0x8 IMMU TSB %tick's ctxnon0, 256mb TTE
85 0xE0 0x20 reserved
86 0x100 0x8 DMMU TSB hit ctx0, 8kb TTE
87 0x108 0x8 DMMU TSB %tick's ctx0, 8kb TTE
88 0x110 0x8 DMMU TSB hit ctx0, 64kb TTE
89 0x118 0x8 DMMU TSB %tick's ctx0, 64kb TTE
90 0x120 0x10 reserved
91 0x130 0x8 DMMU TSB hit ctx0, 4mb TTE
92 0x138 0x8 DMMU TSB %tick's ctx0, 4mb TTE
93 0x140 0x10 reserved
94 0x150 0x8 DMMU TSB hit ctx0, 256mb TTE
95 0x158 0x8 DMMU TSB %tick's ctx0, 256mb TTE
96 0x160 0x20 reserved
97 0x180 0x8 DMMU TSB hit ctxnon0, 8kb TTE
98 0x188 0x8 DMMU TSB %tick's ctxnon0, 8kb TTE
99 0x190 0x8 DMMU TSB hit ctxnon0, 64kb TTE
100 0x198 0x8 DMMU TSB %tick's ctxnon0, 64kb TTE
101 0x1A0 0x10 reserved
102 0x1B0 0x8 DMMU TSB hit ctxnon0, 4mb TTE
103 0x1B8 0x8 DMMU TSB %tick's ctxnon0, 4mb TTE
104 0x1C0 0x10 reserved
105 0x1D0 0x8 DMMU TSB hit ctxnon0, 256mb TTE
106 0x1D8 0x8 DMMU TSB %tick's ctxnon0, 256mb TTE
107 0x1E0 0x20 reserved
108
109 */
110#define MMUSTAT_I 0x0
111#define MMUSTAT_D 0x100
112
113#define MMUSTAT_CTX0 0x0
114#define MMUSTAT_CTXNON0 0x80
115
116#define MMUSTAT_HIT 0x0
117#define MMUSTAT_TICK 0x8
118
119#define MMUSTAT_ENTRY_SZ_SHIFT 4
120
121
122#define MMUSTAT_AREA_SIZE 0x200
123#define MMUSTAT_AREA_ALIGN 0x8
124
125
126#ifdef __cplusplus
127}
128#endif
129
130#endif /* _MMUSTAT_H */