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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / legion / src / host / sparcv9native.c
CommitLineData
920dae64
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: sparcv9native.c
5* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
6* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
7*
8* The above named program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public
10* License version 2 as published by the Free Software Foundation.
11*
12* The above named program is distributed in the hope that it will be
13* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15* General Public License for more details.
16*
17* You should have received a copy of the GNU General Public
18* License along with this work; if not, write to the Free Software
19* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
20*
21* ========== Copyright Header End ============================================
22*/
23/*
24 * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
25 * Use is subject to license terms.
26 */
27
28#pragma ident "@(#)sparcv9native.c 1.1 06/12/07 SMI"
29
30#include <stdio.h>
31#include <stdlib.h>
32
33#include <assert.h>
34
35#include "basics.h"
36#include "fatal.h"
37#include "allocate.h"
38#include "simcore.h"
39#include "config.h"
40#include "xicache.h"
41#include "xdcache.h"
42#include "tsparcv9.h"
43#include "tsparcv9internal.h"
44#include "sparcv9cc.h"
45#include "magictraps.h"
46#include "sparcv9decode.h"
47#include "fpsim.h"
48
49static void fp_trap_gen (simcpu_t *sp, int trap_code);
50
51#define IMPL( _n ) void decoded_impl_sparcv9_##_n (simcpu_t *sp, xicache_instn_t * xcip) {
52#define ENDI NEXT_INSTN(sp); ENDDEF
53#define ENDDEF }
54
55
56IMPL( faddd )
57 FP_EXEC_FPU_ON_CHECK;
58 int except, trap_code;
59 uint64_t result;
60 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
61 uint64_t fsrcopy = v9_get_fsr(sp);
62 uint64_t gsrcopy = sp->v9_gsr;
63
64 except = (*fpsimp->faddd) ((double*) &F64src1, (double*) &F64src2, (double*) &result, fsrcopy, gsrcopy);
65DBGFP( lprintf(sp->gid, "faddd; Fsrc1=0x%llx, Fsrc2=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, F64src2, fsrcopy, gsrcopy, result); );
66 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
67 v9_set_fsr_fp_op(sp, fsrcopy);
68
69 if ( trap_code != 0 ) {
70 fp_trap_gen(sp, trap_code);
71 return;
72 }
73 F64dest = result;
74 ENDI
75
76IMPL( fsubd )
77 FP_EXEC_FPU_ON_CHECK;
78 int except, trap_code;
79 uint64_t result;
80 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
81 uint64_t fsrcopy = v9_get_fsr(sp);
82 uint64_t gsrcopy = sp->v9_gsr;
83
84 except = (*fpsimp->fsubd) ((double*) &F64src1, (double*) &F64src2, (double*) &result, fsrcopy, gsrcopy);
85DBGFP( lprintf(sp->gid, "fsubd; Fsrc1=0x%llx, Fsrc2=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, F64src2, fsrcopy, gsrcopy, result); );
86 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
87 v9_set_fsr_fp_op(sp, fsrcopy);
88
89 if ( trap_code != 0 ) {
90 fp_trap_gen(sp, trap_code);
91 return;
92 }
93 F64dest = result;
94 ENDI
95
96IMPL( fmuld )
97 FP_EXEC_FPU_ON_CHECK;
98 int except, trap_code;
99 uint64_t result;
100 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
101 uint64_t fsrcopy = v9_get_fsr(sp);
102 uint64_t gsrcopy = sp->v9_gsr;
103
104 except = (*fpsimp->fmuld) ((double*) &F64src1, (double*) &F64src2, (double*) &result, fsrcopy, gsrcopy);
105DBGFP( lprintf(sp->gid, "fmuld; Fsrc1=0x%llx, Fsrc2=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, F64src2, fsrcopy, gsrcopy, result); );
106 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
107 v9_set_fsr_fp_op(sp, fsrcopy);
108
109 if ( trap_code != 0 ) {
110 fp_trap_gen(sp, trap_code);
111 return;
112 }
113 F64dest = result;
114 ENDI
115
116IMPL( fdivd )
117 FP_EXEC_FPU_ON_CHECK;
118 int except, trap_code;
119 uint64_t result;
120 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
121 uint64_t fsrcopy = v9_get_fsr(sp);
122 uint64_t gsrcopy = sp->v9_gsr;
123
124 except = (*fpsimp->fdivd) ((double*) &F64src1, (double*) &F64src2, (double*) &result, fsrcopy, gsrcopy);
125DBGFP( lprintf(sp->gid, "fdivd; Fsrc1=0x%llx, Fsrc2=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, F64src2, fsrcopy, gsrcopy, result); );
126 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
127 v9_set_fsr_fp_op(sp, fsrcopy);
128
129 if ( trap_code != 0 ) {
130 fp_trap_gen(sp, trap_code);
131 return;
132 }
133 F64dest = result;
134 ENDI
135
136IMPL( fsqrtd )
137 FP_EXEC_FPU_ON_CHECK;
138 int except, trap_code;
139 uint64_t result;
140 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
141 uint64_t fsrcopy = v9_get_fsr(sp);
142 uint64_t gsrcopy = sp->v9_gsr;
143
144 except = (*fpsimp->fsqrtd) ((double*) &F64src1, (double*) &result, fsrcopy, gsrcopy);
145DBGFP( lprintf(sp->gid, "fsqrtd; Fsrc1=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, fsrcopy, gsrcopy, result); );
146 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
147 v9_set_fsr_fp_op(sp, fsrcopy);
148
149 if ( trap_code != 0 ) {
150 fp_trap_gen(sp, trap_code);
151 return;
152 }
153 F64dest = result;
154 ENDI
155
156IMPL( fadds )
157 FP_EXEC_FPU_ON_CHECK;
158 int except, trap_code;
159 uint32_t result;
160 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
161 uint64_t fsrcopy = v9_get_fsr(sp);
162 uint64_t gsrcopy = sp->v9_gsr;
163
164 except = (*fpsimp->fadds) ((float*) &F32src1, (float*) &F32src2, (float*) &result, fsrcopy, gsrcopy);
165DBGFP( lprintf(sp->gid, "fadds; Fsrc1=0x%lx, Fsrc2=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, F32src2, fsrcopy, gsrcopy, result); );
166 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
167 v9_set_fsr_fp_op(sp, fsrcopy);
168
169 if ( trap_code != 0 ) {
170 fp_trap_gen(sp, trap_code);
171 return;
172 }
173 F32dest = result;
174 ENDI
175
176IMPL( fsubs )
177 FP_EXEC_FPU_ON_CHECK;
178 int except, trap_code;
179 uint32_t result;
180 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
181 uint64_t fsrcopy = v9_get_fsr(sp);
182 uint64_t gsrcopy = sp->v9_gsr;
183
184 except = (*fpsimp->fsubs) ((float*) &F32src1, (float*) &F32src2, (float*) &result, fsrcopy, gsrcopy);
185DBGFP( lprintf(sp->gid, "fsubs; Fsrc1=0x%lx, Fsrc2=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, F32src2, fsrcopy, gsrcopy, result); );
186 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
187 v9_set_fsr_fp_op(sp, fsrcopy);
188
189 if ( trap_code != 0 ) {
190 fp_trap_gen(sp, trap_code);
191 return;
192 }
193 F32dest = result;
194 ENDI
195
196IMPL( fmuls )
197 FP_EXEC_FPU_ON_CHECK;
198 int except, trap_code;
199 uint32_t result;
200 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
201 uint64_t fsrcopy = v9_get_fsr(sp);
202 uint64_t gsrcopy = sp->v9_gsr;
203
204 except = (*fpsimp->fmuls) ((float*) &F32src1, (float*) &F32src2, (float*) &result, fsrcopy, gsrcopy);
205DBGFP( lprintf(sp->gid, "fmuls; Fsrc1=0x%lx, Fsrc2=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, F32src2, fsrcopy, gsrcopy, result); );
206 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
207 v9_set_fsr_fp_op(sp, fsrcopy);
208
209 if ( trap_code != 0 ) {
210 fp_trap_gen(sp, trap_code);
211 return;
212 }
213 F32dest = result;
214 ENDI
215
216IMPL( fsmuld )
217 FP_EXEC_FPU_ON_CHECK;
218 int except, trap_code;
219 uint64_t result;
220 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
221 uint64_t fsrcopy = v9_get_fsr(sp);
222 uint64_t gsrcopy = sp->v9_gsr;
223
224 except = (*fpsimp->fsmuld) ((float*) &F32src1, (float*) &F32src2, (double*) &result, fsrcopy, gsrcopy);
225DBGFP( lprintf(sp->gid, "fsmuld; Fsrc1=0x%lx, Fsrc2=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, F32src2, fsrcopy, gsrcopy, result); );
226 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
227 v9_set_fsr_fp_op(sp, fsrcopy);
228
229 if ( trap_code != 0 ) {
230 fp_trap_gen(sp, trap_code);
231 return;
232 }
233 F64dest = result;
234 ENDI
235
236IMPL( fdivs )
237 FP_EXEC_FPU_ON_CHECK;
238 int except, trap_code;
239 uint32_t result;
240 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
241 uint64_t fsrcopy = v9_get_fsr(sp);
242 uint64_t gsrcopy = sp->v9_gsr;
243
244 except = (*fpsimp->fdivs) ((float*) &F32src1, (float*) &F32src2, (float*) &result, fsrcopy, gsrcopy);
245DBGFP( lprintf(sp->gid, "fdivs; Fsrc1=0x%lx, Fsrc2=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, F32src2, fsrcopy, gsrcopy, result); );
246 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
247 v9_set_fsr_fp_op(sp, fsrcopy);
248
249 if ( trap_code != 0 ) {
250 fp_trap_gen(sp, trap_code);
251 return;
252 }
253 F32dest = result;
254 ENDI
255
256IMPL( fsqrts )
257 FP_EXEC_FPU_ON_CHECK;
258 int except, trap_code;
259 uint32_t result;
260 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
261 uint64_t fsrcopy = v9_get_fsr(sp);
262 uint64_t gsrcopy = sp->v9_gsr;
263
264 except = (*fpsimp->fsqrts) ((float*) &F32src1, (float*) &result, fsrcopy, gsrcopy);
265DBGFP( lprintf(sp->gid, "fsqrts; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, fsrcopy, gsrcopy, result); );
266 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
267 v9_set_fsr_fp_op(sp, fsrcopy);
268
269 if ( trap_code != 0 ) {
270 fp_trap_gen(sp, trap_code);
271 return;
272 }
273 F32dest = result;
274 ENDI
275
276IMPL( fstod )
277 FP_EXEC_FPU_ON_CHECK;
278 int except, trap_code;
279 uint64_t result;
280 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
281 uint64_t fsrcopy = v9_get_fsr(sp);
282 uint64_t gsrcopy = sp->v9_gsr;
283
284 except = (*fpsimp->fstod) ((float*) &F32src1, (double*)&result, fsrcopy, gsrcopy);
285DBGFP( lprintf(sp->gid, "fstod; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F32src1, fsrcopy, gsrcopy, result); );
286 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
287 v9_set_fsr_fp_op(sp, fsrcopy);
288
289 if ( trap_code != 0 ) {
290 fp_trap_gen(sp, trap_code);
291 return;
292 }
293 F64dest = result;
294 ENDI
295
296IMPL( fdtos )
297 FP_EXEC_FPU_ON_CHECK;
298 int except, trap_code;
299 uint32_t result;
300 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
301 uint64_t fsrcopy = v9_get_fsr(sp);
302 uint64_t gsrcopy = sp->v9_gsr;
303
304 except = (*fpsimp->fdtos) ((double*) &F64src1, (float*)&result, fsrcopy, gsrcopy);
305DBGFP( lprintf(sp->gid, "fdtos; Fsrc1=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F64src1, fsrcopy, gsrcopy, result); );
306 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
307 v9_set_fsr_fp_op(sp, fsrcopy);
308
309 if ( trap_code != 0 ) {
310 fp_trap_gen(sp, trap_code);
311 return;
312 }
313 F32dest = result;
314 ENDI
315
316IMPL( fstox )
317 FP_EXEC_FPU_ON_CHECK;
318 int except, trap_code;
319 uint64_t result;
320 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
321 uint64_t fsrcopy = v9_get_fsr(sp);
322 uint64_t gsrcopy = sp->v9_gsr;
323
324 except = (*fpsimp->fstox) ((float*) &F32src1, (void*)&result, fsrcopy, gsrcopy);
325DBGFP( lprintf(sp->gid, "fstox; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F32src1, fsrcopy, gsrcopy, result); );
326 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
327 v9_set_fsr_fp_op(sp, fsrcopy);
328
329 if ( trap_code != 0 ) {
330 fp_trap_gen(sp, trap_code);
331 return;
332 }
333 F64dest = result;
334 ENDI
335
336IMPL( fdtox )
337 FP_EXEC_FPU_ON_CHECK;
338 int except, trap_code;
339 uint64_t result;
340 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
341 uint64_t fsrcopy = v9_get_fsr(sp);
342 uint64_t gsrcopy = sp->v9_gsr;
343
344 except = (*fpsimp->fdtox) ((double*) &F64src1, (void*)&result, fsrcopy, gsrcopy);
345DBGFP( lprintf(sp->gid, "fdtox; Fsrc1=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, fsrcopy, gsrcopy, result); );
346 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
347 v9_set_fsr_fp_op(sp, fsrcopy);
348
349 if ( trap_code != 0 ) {
350 fp_trap_gen(sp, trap_code);
351 return;
352 }
353 F64dest = result;
354 ENDI
355
356IMPL( fstoi )
357 FP_EXEC_FPU_ON_CHECK;
358 int except, trap_code;
359 uint32_t result;
360 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
361 uint64_t fsrcopy = v9_get_fsr(sp);
362 uint64_t gsrcopy = sp->v9_gsr;
363
364 except = (*fpsimp->fstoi) ((float*) &F32src1, (unsigned int*)&result, fsrcopy, gsrcopy);
365DBGFP( lprintf(sp->gid, "fstoi; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, fsrcopy, gsrcopy, result); );
366 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
367 v9_set_fsr_fp_op(sp, fsrcopy);
368
369 if ( trap_code != 0 ) {
370 fp_trap_gen(sp, trap_code);
371 return;
372 }
373 F32dest = result;
374 ENDI
375
376IMPL( fdtoi )
377 FP_EXEC_FPU_ON_CHECK;
378 int except, trap_code;
379 uint32_t result;
380 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
381 uint64_t fsrcopy = v9_get_fsr(sp);
382 uint64_t gsrcopy = sp->v9_gsr;
383
384 except = (*fpsimp->fdtoi) ((double*) &F64src1, (unsigned int*)&result, fsrcopy, gsrcopy);
385DBGFP( lprintf(sp->gid, "fdtoi; Fsrc1=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F64src1, fsrcopy, gsrcopy, result); );
386 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
387 v9_set_fsr_fp_op(sp, fsrcopy);
388
389 if ( trap_code != 0 ) {
390 fp_trap_gen(sp, trap_code);
391 return;
392 }
393 F32dest = result;
394 ENDI
395
396IMPL( fxtos )
397 FP_EXEC_FPU_ON_CHECK;
398 int except, trap_code;
399 uint32_t result;
400 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
401 uint64_t fsrcopy = v9_get_fsr(sp);
402 uint64_t gsrcopy = sp->v9_gsr;
403
404 except = (*fpsimp->fxtos) ((void*) &F32src1, (float*)&result, fsrcopy, gsrcopy);
405DBGFP( lprintf(sp->gid, "fxtos; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, fsrcopy, gsrcopy, result); );
406 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
407 v9_set_fsr_fp_op(sp, fsrcopy);
408
409 if ( trap_code != 0 ) {
410 fp_trap_gen(sp, trap_code);
411 return;
412 }
413 F32dest = result;
414 ENDI
415
416IMPL( fxtod )
417 FP_EXEC_FPU_ON_CHECK;
418 int except, trap_code;
419 uint64_t result;
420 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
421 uint64_t fsrcopy = v9_get_fsr(sp);
422 uint64_t gsrcopy = sp->v9_gsr;
423
424 except = (*fpsimp->fxtod) ((void*) &F64src1, (double*)&result, fsrcopy, gsrcopy);
425DBGFP( lprintf(sp->gid, "fxtod; Fsrc1=0x%llx, FSR=0x%llx, GSR=0x%llx, result=0x%llx\n", F64src1, fsrcopy, gsrcopy, result); );
426 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
427 v9_set_fsr_fp_op(sp, fsrcopy);
428
429 if ( trap_code != 0 ) {
430 fp_trap_gen(sp, trap_code);
431 return;
432 }
433 F64dest = result;
434 ENDI
435
436IMPL( fitos )
437 FP_EXEC_FPU_ON_CHECK;
438 int except, trap_code;
439 uint32_t result;
440 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
441 uint64_t fsrcopy = v9_get_fsr(sp);
442 uint64_t gsrcopy = sp->v9_gsr;
443
444 except = (*fpsimp->fitos) ((unsigned int*) &F32src1, (float*)&result, fsrcopy, gsrcopy);
445DBGFP( lprintf(sp->gid, "fitos; Fsrc1=0x%lx, FSR=0x%llx, GSR=0x%llx, result=0x%lx\n", F32src1, fsrcopy, gsrcopy, result); );
446 trap_code = (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
447 v9_set_fsr_fp_op(sp, fsrcopy);
448
449 if ( trap_code != 0 ) {
450 fp_trap_gen(sp, trap_code);
451 return;
452 }
453 F32dest = result;
454 ENDI
455
456IMPL( fitod )
457 FP_EXEC_FPU_ON_CHECK;
458 int except;
459 uint64_t result;
460 struct fpsim_functions *fpsimp = sp->config_procp->proc_typep->fpsimp;
461 uint64_t fsrcopy = v9_get_fsr(sp);
462
463 except = (*fpsimp->fitod) ((unsigned int*) &F32src1, (double*)&result);
464DBGFP( lprintf(sp->gid, "fitod; Fsrc1=0x%lx, FSR=0x%llx, result=0x%llx\n", F32src1, fsrcopy, result); );
465 (*fpsimp->update_fsr) (except, (void*)&fsrcopy);
466 v9_set_fsr_fp_op(sp, fsrcopy);
467
468 F64dest = result;
469 ENDI
470
471static void fp_trap_gen (simcpu_t *sp, int trap_code) {
472 sparcv9_cpu_t * v9p = (sparcv9_cpu_t*)(sp->specificp);
473 switch (trap_code) {
474 case 0x21:
475 v9p->post_precise_trap(sp, Sparcv9_trap_fp_exception_ieee_754);
476 return;
477 case 0x22:
478 v9p->post_precise_trap(sp, Sparcv9_trap_fp_exception_other);
479 return;
480 case 0x10:
481 v9p->post_precise_trap(sp, Sparcv9_trap_illegal_instruction);
482 return;
483 default:
484 fatal ("unknown fp lib trap_code");
485 return;
486 }
487}
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.