Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / docs / mmi / SAM-modules.html
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4<title>SPARC Architectural Model: Device Modules</title>
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9<h1> SAM Device Modules</h1>
10
11<p>
12This document describes some of the SAM device modules that are available under the SAM source workspace and are included in official SAM package releases.
13
14<p>
15<h2>Programming Model</h2>
16
17All modules reside in the SAM workspace under <b>modules</b>.
18Each module is in a separate subdirectory. <b>modules/Makefile</b> builds all modules.
19
20<p>
21Common code is placed in <b>modules/common</b>.
22This code is compiled into each module separately.
23This allows for preprocessor macros to be expanded uniquely in each module.
24
25<p>
26Create a new module by copying 'sample' (for PCI devices) or 'example' (for any other type) to a new subdirectory.
27Do <i>not</i> copy the SCCS subdirectory.
28<br>Edit the Makefile to change the module name and list of files.
29Make sure the SCCS Id keywords are correct. For example, replace the comment
30lines as shown below:
31<p>
32<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<tt>@(#)sample_mod.cc 1.4 04/08/05</tt>
33<p>
34<br>with
35<p>
36<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<tt>@(#)SAM-modules.html 1.1 05/07/26</tt>
37<p>The modules/Makefile will compile any subdirectory with a Makefile in it.
38
39<h2>Modules</h2>
40
41<h5>common</h5>
42This is code that is included in all modules. It is not compiled separately.
43It provides the following:
44
45<table border=0>
46<tr>
47<td>&nbsp;&nbsp;&nbsp;&nbsp;</td>
48<td><b>arg.cc</b></td>
49<td>&nbsp;&nbsp;utilities for parsing the sysconf command line arguments</td>
50</tr>
51<tr>
52<td>&nbsp;&nbsp;&nbsp;&nbsp;</td>
53<td><b>module.cc</b></td>
54<td>&nbsp;&nbsp;the base class for all modules</td>
55</tr>
56<tr>
57<td>&nbsp;&nbsp;&nbsp;&nbsp;</td>
58<td><b>pci_dev.cc</b></td>
59<td>&nbsp;&nbsp;the base class for all PCI devices</td>
60</tr>
61<tr>
62<td>&nbsp;&nbsp;&nbsp;&nbsp;</td>
63<td><b>include/*.h</b></td>
64<td>&nbsp;&nbsp;header files for common code</td>
65</tr>
66</table>
67
68<h5>sample</h5>
69This is a sample PCI device.
70Use it as a template for new PCI devices.
71It also has some functionality.
72It can be configured to map PCI memory <br>spaces.
73It can also run a periodic timer which shows the simulator MIPs rate.
74<h5>example</h5>
75This is a simple module which can be used as a template for non-device modules.
76<br>(Use "sample" for PCI devices.)
77<h5>examplec</h5>
78This is the same as "example", but it demonstrates how to wrap C code.
79<h5>ll</h5>
80This is the local loopback filesystem driver.
81<h5>parrot</h5>
82This is a loopback pseudo device invented by the ASIC system verification
83team as a target for testing PCI Express.
84It can be a useful example to study because it uses every PCI function there is.
85<h5>pci_bus</h5>
86This is the PCI Bus model.
87It sits between the host bridge (for example, schizo) and PCI devices
88(for example, sample).
89<h5>pcie_bus</h5>
90This is the PCI Express Bus model.
91It is the same code as "pci_bus", except that <font size=-1><tt>#ifdef PCI_EXPRESS</tt></font> is true.
92<h5>sbbc</h5>
93This is a Serengeti controller device.
94It is the interface between service processor, console, and Sparc.
95<h5>schizo</h5>
96This is the Serengeti PCI host bridge.
97It supports two independent PCI busses, denoted as leaf A and leaf B.
98<br>(Note that each leaf starts with PCI bus 0.
99It is a mistake, as in the old Blaze schizo, to think of leaf B as bus 1.)
100<h5>serial</h5>
101This is the serial device model.
102<h5><a href="sgc.html">sgc</a></h5>
103This is the Serengeti Console model.
104It provides services required for OBP.
105
106<h2>Sample Configuration File</h2>
107<pre>
108sysconf -p $HOME/blaze/blaze-conf/modules/64opt
109sysconf sgc sgc0
110#
111sysconf schizo schizo24
112#
113sysconf pci_bus schizo24A bridge=schizo24
114#
115sysconf pci_bus schizo24B bridge=schizo24
116sysconf sample sample24B1 bus=schizo24B dev=1 fun=0 mem32_base=0x08000000 mem32_size=0x2000 -d1
117sysconf sbbc sbbc24B bus=schizo24B dev=4 fun=0
118#
119sysconf schizo schizo25
120#
121sysconf pci_bus schizo25A bridge=schizo25
122sysconf sample sample25A bus=schizo25A dev=1 mem32_base=0x00100000 mem32_size=0x2000 cycle=50000000 -d2
123#
124sysconf pci_bus schizo25B bridge=schizo25
125sysconf sample sample25B2 bus=schizo25B dev=2 fun=0 mem32_base=0x08000000 mem32_size=0x2000 -d1
126#
127sysconf schizo schizo30
128#
129sysconf pci_bus schizo30A bridge=schizo30
130#
131sysconf pci_bus schizo30B bridge=schizo30
132sysconf sample sample30B1 bus=schizo30B dev=1 fun=0 mem32_base=0x08000000 mem32_size=0x2000
133sysconf sbbc sbbc30B bus=schizo30B dev=4 fun=0
134#
135##sysconf schizo schizo31
136###
137##sysconf pci_bus schizo31A bridge=schizo31
138###
139##sysconf pci_bus schizo31B bridge=schizo31
140##sysconf sample sample31B2 bus=schizo31B dev=2 fun=0 mem32_base=0x08000000 mem32_size=0x2000
141</pre>
142
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