Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / lib / ras / xml / N2_L2ErrorAddressReg.xml

<!-- interpreter=xml2reg args='-t' -->
<register_list>
<register name="L2_ERROR_ADDRESS_REG (L2_ERROR_ADDRESS_REG)">
    <class_name>N2_L2ErrorAddressReg</class_name>
    <submodule>N2</submodule>
    <comment>
L2_ERROR_ADDRESS_REG (0xAC-0000-0000 or 0xBC-0000-0000)(Count 8 Step 64)
    </comment>
    <base_address>0xAC00000000ULL</base_address>
    <count>8</count>
    <stride>64</stride>
    <priv>yes</priv>
    <field name="RSVD0">
        <start_offset>0</start_offset>
        <end_offset>3</end_offset>
        <initial_value>0x0</initial_value>
        <protection>RO</protection>
        <field_type>ZERO</field_type>
        <comment>
Reserved. warm-reset=0
        </comment>
    </field>
    <field name="ADDRESS">
        <start_offset>4</start_offset>
        <end_offset>39</end_offset>
        <initial_value>0x0</initial_value>
        <protection>RW</protection>
        <field_type>NORMAL</field_type>
        <comment>
Preserved. warm-reset=X
        </comment>
        <format type="hex"/>
    </field>
</register>
</register_list>