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Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / t1_fpga / src / xilinx / configs / 2c4t_guest.desc
CommitLineData
920dae64
AT		 1/*
2 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
3 * Use is subject to license terms.
4 */
5
6/*
7 * The machine description files are derived from machine description
8 * binaries in OpenSPARC T2 legion simulation directory.
9 */
10
11#include "xilinx_t1_system_config.h"
12
13node root root {
14
15 content-version = "1.0";
16 fwd -> memory;
17 fwd -> cpus;
18 fwd -> phys_io;
19 fwd -> platform;
20 fwd -> openboot;
21 fwd -> virtual-devices;
22 reset-reason = 0x0;
23 fwd -> maus;
24 fwd -> cwqs;
25 md-generation# = 0x1;
26 fwd -> channel-endpoints;
27}
28
29
30node cache cache {
31
32 level = 0x1;
33 type = { "instn" };
34 line-size = 0x20;
35 size = 0x4000;
36 associativity = 0x4;
37 back -> exec-unit;
38 fwd -> cache_4;
39}
40
41
42node cache cache_1 {
43
44 level = 0x1;
45 type = { "data" };
46 line-size = 0x10;
47 size = 0x2000;
48 associativity = 0x4;
49 back -> exec-unit_1;
50 fwd -> cache_4;
51}
52
53node cache cache_2 {
54
55 level = 0x1;
56 type = { "instn" };
57 line-size = 0x20;
58 size = 0x4000;
59 associativity = 0x4;
60 back -> exec-unit_2;
61 fwd -> cache_4;
62}
63
64
65node cache cache_3 {
66
67 level = 0x1;
68 type = { "data" };
69 line-size = 0x10;
70 size = 0x2000;
71 associativity = 0x4;
72 back -> exec-unit_3;
73 fwd -> cache_4;
74}
75
76
77node tlb tlb {
78
79 level = 0x1;
80 type = { "instn" };
81 entries = 0x40;
82 associativity = 0x0;
83 page-size-list = 0x2b;
84 back -> exec-unit;
85}
86
87
88node tlb tlb_1 {
89
90 level = 0x1;
91 type = { "data" };
92 entries = 0x80;
93 associativity = 0x0;
94 page-size-list = 0x2b;
95 back -> exec-unit_1;
96}
97
98
99node tlb tlb_2 {
100
101 level = 0x1;
102 type = { "instn" };
103 entries = 0x40;
104 associativity = 0x0;
105 page-size-list = 0x2b;
106 back -> exec-unit_2;
107}
108
109
110node tlb tlb_3 {
111
112 level = 0x1;
113 type = { "data" };
114 entries = 0x80;
115 associativity = 0x0;
116 page-size-list = 0x2b;
117 back -> exec-unit_3;
118}
119
120
121node exec-unit exec-unit {
122
123 type = { "ifetch" };
124 back -> cpu;
125 back -> cpu_1;
126 back -> cpu_2;
127 back -> cpu_3;
128 fwd -> cache;
129 fwd -> tlb;
130}
131
132
133node exec-unit exec-unit_1 {
134
135 type = { "integer" , "integer-load" , "integer-store" , "fp-load" , "fp-store" };
136 back -> cpu;
137 back -> cpu_1;
138 back -> cpu_2;
139 back -> cpu_3;
140 fwd -> cache_1;
141 fwd -> tlb_1;
142}
143
144node exec-unit exec-unit_2 {
145
146 type = { "ifetch" };
147 back -> cpu_4;
148 back -> cpu_5;
149 back -> cpu_6;
150 back -> cpu_7;
151 fwd -> cache_2;
152 fwd -> tlb_2;
153}
154
155
156node exec-unit exec-unit_3 {
157
158 type = { "integer" , "integer-load" , "integer-store" , "fp-load" , "fp-store" };
159 back -> cpu_4;
160 back -> cpu_5;
161 back -> cpu_6;
162 back -> cpu_7;
163 fwd -> cache_3;
164 fwd -> tlb_3;
165}
166
167
168node cpu cpu {
169
170 id = 0x0;
171 pid = 0x0;
172 serial# = 0x0;
173 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
174 clock-frequency = T1_FPGA_STICK_FREQ;
175 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
176 nwins = 0x8;
177 mmu-type = "sun4v";
178 q-cpu-mondo-#bits = 0x8;
179 q-dev-mondo-#bits = 0x8;
180 q-resumable-#bits = 0x8;
181 q-nonresumable-#bits = 0x8;
182 mmu-max-#tsbs = 0x4;
183 mmu-#context-bits = 0xd;
184 mmu-#shared-contexts = 0x2;
185 mmu-page-size-list = 0x2b;
186 mmu-#va-bits = 0x30;
187 back -> cpus;
188 fwd -> exec-unit;
189 fwd -> exec-unit_1;
190 fwd -> exec-unit_4;
191}
192
193node cpu cpu_1 {
194
195 id = 0x1;
196 pid = 0x1;
197 serial# = 0x0;
198 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
199 clock-frequency = T1_FPGA_STICK_FREQ;
200 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
201 nwins = 0x8;
202 mmu-type = "sun4v";
203 q-cpu-mondo-#bits = 0x8;
204 q-dev-mondo-#bits = 0x8;
205 q-resumable-#bits = 0x8;
206 q-nonresumable-#bits = 0x8;
207 mmu-max-#tsbs = 0x4;
208 mmu-#context-bits = 0xd;
209 mmu-#shared-contexts = 0x2;
210 mmu-page-size-list = 0x2b;
211 mmu-#va-bits = 0x30;
212 back -> cpus;
213 fwd -> exec-unit;
214 fwd -> exec-unit_1;
215 fwd -> exec-unit_4;
216}
217
218
219node cpu cpu_2 {
220
221 id = 0x2;
222 pid = 0x2;
223 serial# = 0x0;
224 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
225 clock-frequency = T1_FPGA_STICK_FREQ;
226 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
227 nwins = 0x8;
228 mmu-type = "sun4v";
229 q-cpu-mondo-#bits = 0x8;
230 q-dev-mondo-#bits = 0x8;
231 q-resumable-#bits = 0x8;
232 q-nonresumable-#bits = 0x8;
233 mmu-max-#tsbs = 0x4;
234 mmu-#context-bits = 0xd;
235 mmu-#shared-contexts = 0x2;
236 mmu-page-size-list = 0x2b;
237 mmu-#va-bits = 0x30;
238 back -> cpus;
239 fwd -> exec-unit;
240 fwd -> exec-unit_1;
241 fwd -> exec-unit_4;
242}
243
244
245node cpu cpu_3 {
246
247 id = 0x3;
248 pid = 0x3;
249 serial# = 0x0;
250 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
251 clock-frequency = T1_FPGA_STICK_FREQ;
252 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
253 nwins = 0x8;
254 mmu-type = "sun4v";
255 q-cpu-mondo-#bits = 0x8;
256 q-dev-mondo-#bits = 0x8;
257 q-resumable-#bits = 0x8;
258 q-nonresumable-#bits = 0x8;
259 mmu-max-#tsbs = 0x4;
260 mmu-#context-bits = 0xd;
261 mmu-#shared-contexts = 0x2;
262 mmu-page-size-list = 0x2b;
263 mmu-#va-bits = 0x30;
264 back -> cpus;
265 fwd -> exec-unit;
266 fwd -> exec-unit_1;
267 fwd -> exec-unit_4;
268}
269
270node cpu cpu_4 {
271
272 id = 0x4;
273 pid = 0x4;
274 serial# = 0x0;
275 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
276 clock-frequency = T1_FPGA_STICK_FREQ;
277 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
278 nwins = 0x8;
279 mmu-type = "sun4v";
280 q-cpu-mondo-#bits = 0x8;
281 q-dev-mondo-#bits = 0x8;
282 q-resumable-#bits = 0x8;
283 q-nonresumable-#bits = 0x8;
284 mmu-max-#tsbs = 0x4;
285 mmu-#context-bits = 0xd;
286 mmu-#shared-contexts = 0x2;
287 mmu-page-size-list = 0x2b;
288 mmu-#va-bits = 0x30;
289 back -> cpus;
290 fwd -> exec-unit_2;
291 fwd -> exec-unit_3;
292 fwd -> exec-unit_4;
293}
294
295
296node cpu cpu_5 {
297
298 id = 0x5;
299 pid = 0x5;
300 serial# = 0x0;
301 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
302 clock-frequency = T1_FPGA_STICK_FREQ;
303 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
304 nwins = 0x8;
305 mmu-type = "sun4v";
306 q-cpu-mondo-#bits = 0x8;
307 q-dev-mondo-#bits = 0x8;
308 q-resumable-#bits = 0x8;
309 q-nonresumable-#bits = 0x8;
310 mmu-max-#tsbs = 0x4;
311 mmu-#context-bits = 0xd;
312 mmu-#shared-contexts = 0x2;
313 mmu-page-size-list = 0x2b;
314 mmu-#va-bits = 0x30;
315 back -> cpus;
316 fwd -> exec-unit_2;
317 fwd -> exec-unit_3;
318 fwd -> exec-unit_4;
319}
320
321
322node cpu cpu_6 {
323
324 id = 0x6;
325 pid = 0x6;
326 serial# = 0x0;
327 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
328 clock-frequency = T1_FPGA_STICK_FREQ;
329 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
330 nwins = 0x8;
331 mmu-type = "sun4v";
332 q-cpu-mondo-#bits = 0x8;
333 q-dev-mondo-#bits = 0x8;
334 q-resumable-#bits = 0x8;
335 q-nonresumable-#bits = 0x8;
336 mmu-max-#tsbs = 0x4;
337 mmu-#context-bits = 0xd;
338 mmu-#shared-contexts = 0x2;
339 mmu-page-size-list = 0x2b;
340 mmu-#va-bits = 0x30;
341 back -> cpus;
342 fwd -> exec-unit_2;
343 fwd -> exec-unit_3;
344 fwd -> exec-unit_4;
345}
346
347
348node cpu cpu_7 {
349
350 id = 0x7;
351 pid = 0x7;
352 serial# = 0x0;
353 isalist = { "sparcv9" , "sparcv8plus" , "sparcv8" , "sparcv8-fsmuld" , "sparcv7" , "sparc" };
354 clock-frequency = T1_FPGA_STICK_FREQ;
355 compatible = { "SUNW,UltraSPARC-T1" , "SUNW,sun4v-cpu" , "sun4v" };
356 nwins = 0x8;
357 mmu-type = "sun4v";
358 q-cpu-mondo-#bits = 0x8;
359 q-dev-mondo-#bits = 0x8;
360 q-resumable-#bits = 0x8;
361 q-nonresumable-#bits = 0x8;
362 mmu-max-#tsbs = 0x4;
363 mmu-#context-bits = 0xd;
364 mmu-#shared-contexts = 0x2;
365 mmu-page-size-list = 0x2b;
366 mmu-#va-bits = 0x30;
367 back -> cpus;
368 fwd -> exec-unit_2;
369 fwd -> exec-unit_3;
370 fwd -> exec-unit_4;
371}
372
373
374
375node exec-unit exec-unit_4 {
376
377 type = { "fp" };
378 back -> cpu;
379}
380
381
382node cpus cpus {
383
384 fwd -> cpu;
385 fwd -> cpu_1;
386 fwd -> cpu_2;
387 fwd -> cpu_3;
388 fwd -> cpu_4;
389 fwd -> cpu_5;
390 fwd -> cpu_6;
391 fwd -> cpu_7;
392 back -> root;
393}
394
395
396node cache cache_4 {
397
398 level = 0x2;
399 type = { "instn" , "data" };
400 line-size = 0x40;
401 size = 0x300000;
402 associativity = 0xC;
403 back -> cache;
404 back -> cache_1;
405 back -> cache_2;
406 back -> cache_3;
407}
408
409
410node phys_io phys_io {
411
412 back -> root;
413 fwd -> iodevice;
414}
415
416
417node iodevice iodevice {
418
419 back -> phys_io;
420 name = "pci";
421 pseudonym = "pci";
422 disabled = 0x0;
423 device-type = "pciex";
424 compatible = { "SUNW,sun4v-pci" };
425 cfg-handle = 0x0;
426 address-ranges = { 0x00 , 0x00 , 0x00 , 0xc8 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x10 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0xca , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x7f , 0xff , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0xcc , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x03 , 0xff , 0xff , 0x00 , 0x00 };
427 virtual-dma = { 0x00 , 0x00 , 0x00 , 0x00 , 0x80 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x80 , 0x00 , 0x00 , 0x00 };
428 ino-bitmap = 0xf;
429 probe-list = "0";
430 msi-address-ranges = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x7f , 0xff , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x01 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x03 , 0x00 , 0x00 , 0x00 , 0x00 , 0xff , 0xff , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x01 , 0x00 , 0x00 };
431 #msi = 0x100;
432 msi-data-mask = 0xff;
433 msi-ranges = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x01 , 0x00 };
434 msi-eq-size = 0x80;
435 msix-data-width = 0x20;
436 #msi-eqs = 0x24;
437 msi-eq-to-devino = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x24 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x18 };
438 interrupts = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x3f , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x3e };
439 #interrupt-cells = 0x1;
440 interrupt-map-mask = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0xff , 0xf0 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x07 };
441 bus-ranges = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0xff };
442 fwd -> interrupt-map-entry;
443 fwd -> interrupt-map-entry_1;
444 fwd -> interrupt-map-entry_2;
445 fwd -> interrupt-map-entry_3;
446}
447
448
449node interrupt-maps interrupt-maps {
450
451 back -> openboot;
452 fwd -> interrupt-map;
453}
454
455
456node interrupt-map interrupt-map {
457
458 back -> interrupt-maps;
459 dev = "/pci@0";
460 parent = "/pci@0";
461 intr-cells = 0x1;
462 intr-mask = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0xff , 0xf0 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x07 };
463 interrupts = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x3f , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x3e };
464 fwd -> interrupt;
465 fwd -> interrupt_1;
466 fwd -> interrupt_2;
467 fwd -> interrupt_3;
468}
469
470
471node interrupt interrupt {
472
473 back -> interrupt-map;
474 intr = 0x1;
475 ino = 0x14;
476 addr = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
477}
478
479
480node interrupt interrupt_1 {
481
482 back -> interrupt-map;
483 intr = 0x2;
484 ino = 0x15;
485 addr = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
486}
487
488
489node interrupt interrupt_2 {
490
491 back -> interrupt-map;
492 intr = 0x3;
493 ino = 0x16;
494 addr = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
495}
496
497
498node interrupt interrupt_3 {
499
500 back -> interrupt-map;
501 intr = 0x4;
502 ino = 0x17;
503 addr = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
504}
505
506
507node interrupt-map-entry interrupt-map-entry {
508
509 child-unit-address = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
510 child-interrupt = 0x1;
511 parent-interrupt = 0x14;
512 parent-device-path = "/pci@0";
513 back -> iodevice;
514}
515
516
517node interrupt-map-entry interrupt-map-entry_1 {
518
519 child-unit-address = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
520 child-interrupt = 0x2;
521 parent-interrupt = 0x15;
522 parent-device-path = "/pci@0";
523 back -> iodevice;
524}
525
526
527node interrupt-map-entry interrupt-map-entry_2 {
528
529 child-unit-address = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
530 child-interrupt = 0x3;
531 parent-interrupt = 0x16;
532 parent-device-path = "/pci@0";
533 back -> iodevice;
534}
535
536
537node interrupt-map-entry interrupt-map-entry_3 {
538
539 child-unit-address = { 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x02 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 , 0x00 };
540 child-interrupt = 0x4;
541 parent-interrupt = 0x17;
542 parent-device-path = "/pci@0";
543 back -> iodevice;
544}
545
546
547node openboot openboot {
548
549 back -> root;
550 fwd -> interrupt-maps;
551 fwd -> devalias;
552 fwd -> variables;
553}
554
555
556node variables variables {
557
558 back -> openboot;
559 fcode-debug? = "true";
560 boot-device = "vdisk";
561 auto-boot? = "false";
562}
563
564
565node virtual-devices virtual-devices {
566
567 back -> root;
568 name = "virtual-devices";
569 cfg-handle = 0x100;
570 probe-list = 0x1f;
571 compatible = { "SUNW,sun4v-virtual-devices" };
572 device-type = "virtual-devices";
573 fwd -> virtual-device;
574 fwd -> channel-devices;
575 fwd -> virtual-device_4;
576 fwd -> virtual-device_5;
577}
578
579
580node mblock mblock {
581
582 base = T1_FPGA_GUEST_MEMBASE;
583 size = T1_FPGA_GUEST_MEMSIZE;
584 back -> memory;
585}
586
587
588node memory memory {
589
590 memory-generation-id# = 0x0;
591 fwd -> mblock;
592 back -> root;
593}
594
595
596node platform platform {
597
598 banner-name = "Sun Fire T1000";
599 name = "SUNW,Sun-Fire-T1000";
600 watchdog-resolution = 0x3e8;
601 watchdog-max-timeout = 0x757b12c00;
602 max-cpus = 0x20;
603 mac-address = 0x00E0815F2CAB;
604 hostid = 0x83f9edf0;
605 serial# = 0xab4130;
606 stick-frequency = T1_FPGA_STICK_FREQ;
607 back -> root;
608 domaining-enabled = 0x1;
609}
610
611
612node maus maus {
613
614}
615
616
617node cwqs cwqs {
618
619}
620
621
622node virtual-device virtual-device {
623
624 back -> virtual-devices;
625 name = "console";
626 device-type = "serial";
627 intr = 0x1;
628 ino = 0x11;
629 channel# = 0x0;
630 cfg-handle = 0x1;
631 compatible = { "qcn" , "SUNW,sun4v-console" };
632}
633
634
635node devalias devalias {
636
637 back -> openboot;
638 vdisk = "/virtual-devices/disk@0";
639 snet = "/virtual-devices/network@0";
640 ttya = "/virtual-devices/console@1";
641 nvram = "/virtual-devices/nvram@3";
642 ttyb = "/virtual-devices/console@4";
643 scsi = "/pci@7c0/scsi@1";
644 disk = "/pci@7c0/scsi@1/disk@0";
645 virtual-console = "/virtual-devices/console@1";
646}
647
648
649node channel-devices channel-devices {
650
651 back -> virtual-devices;
652 name = "channel-devices";
653 device-type = "channel-devices";
654 compatible = { "SUNW,sun4v-channel-devices" };
655 cfg-handle = 0x200;
656 fwd -> virtual-device_1;
657 fwd -> virtual-device_2;
658 fwd -> virtual-device_3;
659}
660
661
662node channel-endpoints channel-endpoints {
663
664 back -> root;
665 fwd -> channel-endpoint;
666 fwd -> channel-endpoint_1;
667 fwd -> channel-endpoint_2;
668}
669
670
671node channel-endpoint channel-endpoint {
672
673 back -> channel-endpoints;
674 id = 0x2;
675 tx-ino = 0x4;
676 rx-ino = 0x5;
677}
678
679
680node virtual-device virtual-device_1 {
681
682 back -> channel-devices;
683 compatible = { "SUNW,sun4v-channel" };
684 device-type = "serial";
685 name = "virtual-channel";
686 cfg-handle = 0x0;
687 fwd -> virtual-device-port;
688 fwd -> virtual-device-port_1;
689}
690
691
692node virtual-device-port virtual-device-port {
693
694 back -> virtual-device_1;
695 name = "vldc-port";
696 id = 0x0;
697 fwd -> channel-endpoint_1;
698 vldc-svc-name = "hvctl";
699}
700
701
702node channel-endpoint channel-endpoint_1 {
703
704 back -> channel-endpoints;
705 id = 0x0;
706 tx-ino = 0x0;
707 rx-ino = 0x1;
708 back -> virtual-device-port;
709}
710
711
712node virtual-device-port virtual-device-port_1 {
713
714 back -> virtual-device_1;
715 name = "vldc-port";
716 id = 0x1;
717 fwd -> channel-endpoint_2;
718 vldc-svc-name = "ldom-primary";
719}
720
721
722node channel-endpoint channel-endpoint_2 {
723
724 back -> channel-endpoints;
725 id = 0x1;
726 tx-ino = 0x2;
727 rx-ino = 0x3;
728 back -> virtual-device-port_1;
729}
730
731
732node virtual-device virtual-device_2 {
733
734 back -> channel-devices;
735 compatible = { "SUNW,sun4v-console-concentrator" };
736 device-type = "vcc";
737 name = "virtual-console-concentrator";
738 cfg-handle = 0x0;
739}
740
741
742node virtual-device virtual-device_3 {
743
744 back -> channel-devices;
745 compatible = { "SUNW,sun4v-disk-server" };
746 device-type = "vds";
747 name = "virtual-disk-server";
748 cfg-handle = 0x0;
749}
750
751
752node virtual-device virtual-device_4 {
753
754 back -> virtual-devices;
755 name = "disk";
756 fcode-driver-name = "disk-virtual-device";
757 my-space = 0x0;
758 intr = 0x0;
759 ino = 0x0;
760 cfg-handle = 0x0;
761}
762
763
764node virtual-device virtual-device_5 {
765
766 back -> virtual-devices;
767 name = "snet";
768 fcode-driver-name = "net-virtual-device";
769 my-space = 0x0;
770 intr = 0x0;
771 ino = T1_FPGA_SNET_INO;
772 cfg-handle = 0x2;
773}
Full OpenSPARC architecture tarball including simulator, hypervisor, and OBP.