Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / hypervisor / src / greatlakes / huron / legion / offsets.chk
! struct/union NAMETABLE_SIZE size 0x2e8
u 0x0 0x8 HDNAME_ROOT
u 0x8 0x8 HDNAME_FWD
u 0x10 0x8 HDNAME_BACK
u 0x18 0x8 HDNAME_ID
u 0x20 0x8 HDNAME_CPUS
u 0x28 0x8 HDNAME_CPU
u 0x30 0x8 HDNAME_DEVICES
u 0x38 0x8 HDNAME_DEVICE
u 0x40 0x8 HDNAME_SERVICES
u 0x48 0x8 HDNAME_SERVICE
u 0x50 0x8 HDNAME_GUESTS
u 0x58 0x8 HDNAME_GUEST
u 0x60 0x8 HDNAME_MAU
u 0x68 0x8 HDNAME_MAUS
u 0x70 0x8 HDNAME_CWQ
u 0x78 0x8 HDNAME_CWQS
u 0x80 0x8 HDNAME_ROMSIZE
u 0x88 0x8 HDNAME_ROMBASE
u 0x90 0x8 HDNAME_MEMORY
u 0x98 0x8 HDNAME_MBLOCK
u 0xa0 0x8 HDNAME_UNBIND
u 0xa8 0x8 HDNAME_MDPA
u 0xb0 0x8 HDNAME_SIZE
u 0xb8 0x8 HDNAME_UARTBASE
u 0xc0 0x8 HDNAME_BASE
u 0xc8 0x8 HDNAME_LINK
u 0xd0 0x8 HDNAME_INOBITMAP
u 0xd8 0x8 HDNAME_TOD
u 0xe0 0x8 HDNAME_TODFREQUENCY
u 0xe8 0x8 HDNAME_TODOFFSET
u 0xf0 0x8 HDNAME_VID
u 0xf8 0x8 HDNAME_XID
u 0x100 0x8 HDNAME_PID
u 0x108 0x8 HDNAME_SID
u 0x110 0x8 HDNAME_GID
u 0x118 0x8 HDNAME_STRANDID
u 0x120 0x8 HDNAME_PARTTAG
u 0x128 0x8 HDNAME_IGN
u 0x130 0x8 HDNAME_INO
u 0x138 0x8 HDNAME_MTU
u 0x140 0x8 HDNAME_MEMOFFSET
u 0x148 0x8 HDNAME_MEMSIZE
u 0x150 0x8 HDNAME_MEMBASE
u 0x158 0x8 HDNAME_REALBASE
u 0x160 0x8 HDNAME_HYPERVISOR
u 0x168 0x8 HDNAME_PERFCTRACCESS
u 0x170 0x8 HDNAME_PERFCTRHTACCESS
u 0x178 0x8 HDNAME_RNGCTLACCESSIBLE
u 0x180 0x8 HDNAME_VPCIDEVICE
u 0x188 0x8 HDNAME_PCIREGS
u 0x190 0x8 HDNAME_CFGHANDLE
u 0x198 0x8 HDNAME_CFGBASE
u 0x1a0 0x8 HDNAME_DISKPA
u 0x1a8 0x8 HDNAME_DIAGPRIV
u 0x1b0 0x8 HDNAME_DEBUGPRINTFLAGS
u 0x1b8 0x8 HDNAME_IOBASE
u 0x1c0 0x8 HDNAME_HVUART
u 0x1c8 0x8 HDNAME_FLAGS
u 0x1d0 0x8 HDNAME_STICKFREQUENCY
u 0x1d8 0x8 HDNAME_CEBLACKOUTSEC
u 0x1e0 0x8 HDNAME_CEPOLLSEC
u 0x1e8 0x8 HDNAME_MEMSCRUBMAX
u 0x1f0 0x8 HDNAME_ERPT_PA
u 0x1f8 0x8 HDNAME_ERPT_SIZE
u 0x200 0x8 HDNAME_VDEVS
u 0x208 0x8 HDNAME_RESET_REASON
u 0x210 0x8 HDNAME_LDC_ENDPOINTS
u 0x218 0x8 HDNAME_SP_LDC_ENDPOINTS
u 0x220 0x8 HDNAME_LDC_ENDPOINT
u 0x228 0x8 HDNAME_CHANNEL
u 0x230 0x8 HDNAME_TARGET_TYPE
u 0x238 0x8 HDNAME_TARGET_GUEST
u 0x240 0x8 HDNAME_TARGET_CHANNEL
u 0x248 0x8 HDNAME_TX_INO
u 0x250 0x8 HDNAME_RX_INO
u 0x258 0x8 HDNAME_SVC_ID
u 0x260 0x8 HDNAME_SVC_ARG
u 0x268 0x8 HDNAME_SVC_VINO
u 0x270 0x8 HDNAME_PRIVATE_SVC
u 0x278 0x8 HDNAME_LDC_MAPINRABASE
u 0x280 0x8 HDNAME_LDC_MAPINSIZE
u 0x288 0x8 HDNAME_IDX
u 0x290 0x8 HDNAME_RESOURCE_ID
u 0x298 0x8 HDNAME_CONSOLES
u 0x2a0 0x8 HDNAME_CONSOLE
u 0x2a8 0x8 HDNAME_VIRTUAL_DEVICES
u 0x2b0 0x8 HDNAME_CHANNEL_DEVICES
u 0x2b8 0x8 HDNAME_SYS_HWTW_MODE
u 0x2c0 0x8 HDNAME_PCIE_BUS
u 0x2c8 0x8 HDNAME_ALLOW_BYPASS
u 0x2d0 0x8 HDNAME_L2SCRUB_INTERVAL
u 0x2d8 0x8 HDNAME_L2SCRUB_ENTRIES
u 0x2e0 0x8 HDNAME_CONTENT_VERSION
! struct/union CONFIG_SIZE size 0x570
u 0x0 0x8 CONFIG_MEMBASE
u 0x8 0x8 CONFIG_MEMSIZE
p 0x10 0x8 CONFIG_ACTIVE_HVMD
p 0x18 0x8 CONFIG_PARSE_HVMD
u 0x20 0x8 CONFIG_RELOC
p 0x28 0x8 CONFIG_GUESTS
p 0x30 0x8 CONFIG_MBLOCKS
p 0x38 0x8 CONFIG_VCPUS
p 0x40 0x8 CONFIG_STRANDS
p 0x48 0x8 CONFIG_VSTATE
p 0x50 0x8 CONFIG_PCIE_BUSSES
p 0x58 0x8 CONFIG_HV_LDCS
p 0x60 0x8 CONFIG_SP_LDCS
u 0x68 0x8 CONFIG_SP_LDC_MAX_CID
p 0x70 0x8 CONFIG_DUMMYTSB
u 0x78 0x8 CONFIG_SINGLE_STRAND_LOCK
u 0x80 0x8 CONFIG_STRAND_STARTSET
u 0x88 0x8 CONFIG_STPRES
u 0x90 0x8 CONFIG_STACTIVE
u 0x98 0x8 CONFIG_STIDLE
u 0xa0 0x8 CONFIG_STHALT
u 0xa8 0x8 CONFIG_PRINT_SPINLOCK
u 0xb0 0x8 CONFIG_HEARTBEAT_CPU
u 0xb8 0x8 CONFIG_ERROR_SVCH
p 0xc0 0x8 CONFIG_SVCS
p 0xc8 0x8 CONFIG_VINTR
u 0xd0 0x8 CONFIG_HVUART_ADDR
u 0xd8 0x8 CONFIG_TOD
u 0xe0 0x8 CONFIG_TODFREQUENCY
u 0xe8 0x8 CONFIG_STICKFREQUENCY
u 0xf0 0x8 CONFIG_SYS_HWTW_MODE
u 0xf8 0x8 CONFIG_ERPT_PA
u 0x100 0x8 CONFIG_ERPT_SIZE
u 0x108 0x8 CONFIG_SRAM_ERPT_BUF_INUSE
p 0x118 0x8 CONFIG_DEVS_DTNODE
p 0x120 0x8 CONFIG_SVCS_DTNODE
p 0x128 0x8 CONFIG_GUESTS_DTNODE
p 0x130 0x8 CONFIG_CPUS_DTNODE
p 0x138 0x8 CONFIG_HV_LDCS_DTNODE
p 0x140 0x8 CONFIG_SP_LDCS_DTNODE
u 0x148 0x8 CONFIG_ERRORLOCK
! struct CONFIG_HDNAMETABLE @ 0x150 has size 0x2e8
u 0x438 0x8 CONFIG_INTRTGT
u 0x440 0x8 CONFIG_MEMSCRUB_MAX
p 0x448 0x8 CONFIG_DEVINSTANCES
u 0x450 0x8 CONFIG_CYCLIC_MAXD
uc 0x458 0x1 CONFIG_HVCTL_STATE
u 0x45a 0x2 CONFIG_HVCTL_HV_SEQ
u 0x45c 0x2 CONFIG_HVCTL_ZEUS_SEQ
u 0x468 0x8 CONFIG_HVCTL_RAND_NUM
! array CONFIG_HVCTL_IBUF @ 0x470 size 0x200 : element size 0x8
u 0x470 0x8 CONFIG_HVCTL_IBUF
! array CONFIG_HVCTL_OBUF @ 0x4b0 size 0x200 : element size 0x8
u 0x4b0 0x8 CONFIG_HVCTL_OBUF
u 0x4f0 0x8 CONFIG_HVCTL_IP
u 0x4f8 0x8 CONFIG_HVCTL_LDC
u 0x500 0x8 CONFIG_HVCTL_LDC_LOCK
u 0x508 0x8 CONFIG_CE_BLACKOUT
u 0x510 0x8 CONFIG_CE_POLL_TIME
u 0x518 0x8 CONFIG_ERRS_TO_SEND
u 0x520 0x8 CONFIG_PHYSMEMSIZE
u 0x528 0x8 CONFIG_DEL_RECONF_GID
u 0x538 0x8 CONFIG_SCRUB_SYNC
u 0x540 0x8 CONFIG_FPGA_STATUS_LOCK
u 0x548 0x8 CONFIG_L2SCRUB_INTERVAL
u 0x550 0x8 CONFIG_L2SCRUB_ENTRIES
! struct CONFIG_MCONFIG @ 0x558 has size 0x18
! struct/union MAU_SIZE size 0xd0
u 0x0 0x8 MAU_PID
u 0x8 0x8 MAU_STATE
u 0x10 0x8 MAU_HANDLE
u 0x18 0x8 MAU_INO
u 0x20 0x8 MAU_STORE_IN_PROGR
u 0x28 0x8 MAU_ENABLE_CWQ
u 0x30 0x8 MAU_CPUSET
! array MAU_CPU_ACTIVE @ 0x38 size 0x40 : element size 0x1
uc 0x38 0x1 MAU_CPU_ACTIVE
! struct MAU_QUEUE @ 0x40 has size 0x50
! struct MAU_IHDLR @ 0x90 has size 0x18
! struct/union CWQ_SIZE size 0x1140
u 0x0 0x8 CWQ_PID
u 0x8 0x8 CWQ_STATE
u 0x10 0x8 CWQ_HANDLE
u 0x18 0x8 CWQ_INO
u 0x20 0x8 CWQ_CPUSET
! array CWQ_CPU_ACTIVE @ 0x28 size 0x40 : element size 0x1
uc 0x28 0x1 CWQ_CPU_ACTIVE
! struct CWQ_IHDLR @ 0x30 has size 0x18
! struct CWQ_QUEUE @ 0x70 has size 0x10d0
! struct/union RNG_SIZE size 0x40
u 0x0 0x4 RNG_LOCK
! struct RNG_CTL @ 0x8 has size 0x38
! struct/union RWINDOW_SIZE size 0x80
! array INS @ 0x0 size 0x200 : element size 0x8
u 0x0 0x8 INS
! array OUTS @ 0x40 size 0x200 : element size 0x8
u 0x40 0x8 OUTS
! struct/union VCPUTRAPSTATE_SIZE size 0x28
u 0x0 0x8 VCTS_TPC
u 0x8 0x8 VCTS_TNPC
u 0x10 0x8 VCTS_TSTATE
u 0x18 0x8 VCTS_TT
u 0x20 0x8 VCTS_HTSTATE
! struct/union VCPU_GLOBALS_SIZE size 0x38
! array VCPU_GLOBALS_G @ 0x0 size 0x1c0 : element size 0x8
u 0x0 0x8 VCPU_GLOBALS_G
! struct/union VCPUSTATE_SIZE size 0x670
u 0x0 0x8 VS_TL
! array VS_TRAPSTACK @ 0x8 size 0x780 : element size 0x28
! struct VS_TRAPSTACK @ 0x8 has size 0xf0
u 0xf8 0x8 VS_GL
! array VS_GLOBALS @ 0x100 size 0x540 : element size 0x38
! struct VS_GLOBALS @ 0x100 has size 0xa8
u 0x1a8 0x8 VS_TBA
u 0x1b0 0x8 VS_Y
u 0x1b8 0x8 VS_ASI
u 0x1c0 0x8 VS_SOFTINT
u 0x1c8 0x8 VS_PIL
u 0x1d0 0x8 VS_GSR
u 0x1d8 0x8 VS_TICK
u 0x1e0 0x8 VS_STICK
u 0x1e8 0x8 VS_STICKCOMPARE
! array VS_SCRATCHPAD @ 0x1f0 size 0x200 : element size 0x8
u 0x1f0 0x8 VS_SCRATCHPAD
u 0x230 0x8 VS_CWP
u 0x238 0x8 VS_WSTATE
u 0x240 0x8 VS_CANSAVE
u 0x248 0x8 VS_CANRESTORE
u 0x250 0x8 VS_OTHERWIN
u 0x258 0x8 VS_CLEANWIN
! array VS_WINS @ 0x260 size 0x2000 : element size 0x80
! struct VS_WINS @ 0x260 has size 0x400
u 0x660 0x2 VS_CPU_MONDO_HEAD
u 0x662 0x2 VS_CPU_MONDO_TAIL
u 0x664 0x2 VS_DEV_MONDO_HEAD
u 0x666 0x2 VS_DEV_MONDO_TAIL
u 0x668 0x2 VS_ERROR_RESUMABLE_HEAD
u 0x66a 0x2 VS_ERROR_RESUMABLE_TAIL
u 0x66c 0x2 VS_ERROR_NONRESUMABLE_HEAD
u 0x66e 0x2 VS_ERROR_NONRESUMABLE_TAIL
! struct/union VCPU_SIZE size 0x9f8
p 0x0 0x8 CPU_GUEST
p 0x8 0x8 CPU_ROOT
p 0x10 0x8 CPU_STRAND
u 0x18 0x4 CPU_RES_ID
uc 0x1c 0x1 CPU_STRAND_SLOT
uc 0x1d 0x1 CPU_VID
uc 0x1e 0x1 CPU_PARTTAG
! array CPU_SCR @ 0x20 size 0x200 : element size 0x8
u 0x20 0x8 CPU_SCR
u 0x60 0x8 CPU_STATUS
u 0x80 0x8 CPU_CMD_LASTPOKE
u 0x88 0x8 CPU_COMMAND
u 0x90 0x8 CPU_CMD_ARG0
u 0x98 0x8 CPU_CMD_ARG1
u 0xa0 0x8 CPU_CMD_ARG2
u 0xa8 0x8 CPU_CMD_ARG3
u 0xb0 0x8 CPU_CMD_ARG4
u 0xb8 0x8 CPU_CMD_ARG5
u 0xc0 0x8 CPU_CMD_ARG6
u 0xc8 0x8 CPU_CMD_ARG7
u 0xd0 0x8 CPU_VINTR
u 0xd8 0x8 CPU_START_PC
u 0xe0 0x8 CPU_START_ARG
u 0xe8 0x8 CPU_RTBA
u 0xf0 0x8 CPU_MMU_AREA
u 0xf8 0x8 CPU_MMU_AREA_RA
u 0x100 0x8 CPU_CPUQ_BASE
u 0x108 0x8 CPU_CPUQ_SIZE
u 0x110 0x8 CPU_CPUQ_MASK
u 0x118 0x8 CPU_CPUQ_BASE_RA
u 0x120 0x8 CPU_DEVQ_BASE
u 0x128 0x8 CPU_DEVQ_SIZE
u 0x130 0x8 CPU_DEVQ_MASK
u 0x138 0x8 CPU_DEVQ_BASE_RA
u 0x140 0x8 CPU_DEVQ_LOCK
u 0x148 0x8 CPU_DEVQ_SHDW_TAIL
u 0x150 0x8 CPU_ERRQNR_BASE
u 0x158 0x8 CPU_ERRQNR_SIZE
u 0x160 0x8 CPU_ERRQNR_MASK
u 0x168 0x8 CPU_ERRQNR_BASE_RA
u 0x170 0x8 CPU_ERRQR_BASE
u 0x178 0x8 CPU_ERRQR_SIZE
u 0x180 0x8 CPU_ERRQR_MASK
u 0x188 0x8 CPU_ERRQR_BASE_RA
u 0x190 0x8 CPU_TTRACE_OFFSET
u 0x198 0x8 CPU_TTRACEBUF_SIZE
u 0x1a0 0x8 CPU_TTRACEBUF_RA
u 0x1a8 0x8 CPU_TTRACEBUF_PA
u 0x1b0 0x8 CPU_NTSBS_CTX0
u 0x1b8 0x8 CPU_NTSBS_CTXN
! array CPU_TSBDS_CTX0 @ 0x1c0 size 0x400 : element size 0x1
uc 0x1c0 0x1 CPU_TSBDS_CTX0
! array CPU_TSBDS_CTXN @ 0x240 size 0x400 : element size 0x1
uc 0x240 0x1 CPU_TSBDS_CTXN
u 0x2c0 0x8 CPU_MMUSTAT_AREA
u 0x2c8 0x8 CPU_MMUSTAT_AREA_RA
p 0x2d0 0x8 CPU_MAU
p 0x2d8 0x8 CPU_CWQ
p 0x2e0 0x8 CPU_RNG
! array CPU_SVCREGS @ 0x2e8 size 0x180 : element size 0x8
u 0x2e8 0x8 CPU_SVCREGS
u 0x318 0x4 CPU_LDC_INTR_PEND
u 0x320 0x8 CPU_LDC_ENDPOINT
! struct CPU_STATE_SAVE_AREA @ 0x350 has size 0x670
uc 0x9c0 0x1 CPU_LAUNCH_WITH_RETRY
! struct CPU_UTIL @ 0x9d0 has size 0x28
#define CPU_SCR0 (CPU_SCR + (0 * CPU_SCR_INCR))
#define CPU_SCR1 (CPU_SCR + (1 * CPU_SCR_INCR))
#define CPU_SCR2 (CPU_SCR + (2 * CPU_SCR_INCR))
#define CPU_SCR3 (CPU_SCR + (3 * CPU_SCR_INCR))
! struct/union VCPU_UTIL_SIZE size 0x28
u 0x0 0x8 VCUTIL_STICK_LAST
u 0x8 0x8 VCUTIL_YIELD_COUNT
u 0x10 0x8 VCUTIL_YIELD_START
#define CPU_UTIL_STICK_LAST (CPU_UTIL + VCUTIL_STICK_LAST)
#define CPU_UTIL_YIELD_COUNT (CPU_UTIL + VCUTIL_YIELD_COUNT)
#define CPU_UTIL_YIELD_START (CPU_UTIL + VCUTIL_YIELD_START)
! struct/union SCHED_SLOT_SIZE size 0x10
u 0x0 0x8 SCHED_SLOT_ACTION
u 0x8 0x8 SCHED_SLOT_ARG
! struct/union HVCTL_HEADER_SIZE size 0x8
u 0x0 0x2 HVCTL_HEADER_OP
! struct/union HVCTL_MSG_SIZE size 0x40
! struct HVCTL_MSG_HDR @ 0x0 has size 0x8
! union HVCTL_MSG_MSG @ 0x8 has size 0x38
! struct/union HVM_SCHED_SIZE size 0x8
u 0x0 0x8 HVM_SCHED_VCPUP
! struct/union HVM_SCRUB_SIZE size 0x10
u 0x0 0x8 HVM_SCRUB_START_PA
u 0x8 0x8 HVM_SCRUB_START_LEN
! struct/union HVM_GUESTCMD_SIZE size 0x10
u 0x0 0x8 HVM_GUESTCMD_VCPUP
u 0x8 0x8 HVM_GUESTCMD_ARG
! struct/union HVM_STOPGUEST_SIZE size 0x8
u 0x0 0x8 HVM_STOPGUEST_GUESTP
! struct/union HVM_SIZE size 0x40
u 0x0 0x8 HVM_CMD
u 0x8 0x8 HVM_FROM_STRANDP
! union HVM_ARGS @ 0x10 has size 0x30
! struct/union XCALL_MBOX_SIZE size 0x48
u 0x0 0x8 XCMB_COMMAND
! array XCMB_MONDOBUF @ 0x8 size 0x200 : element size 0x8
u 0x8 0x8 XCMB_MONDOBUF
! struct/union MINI_STACK_SIZE size 0x188
u 0x0 0x8 MINI_STACK_PTR
! array MINI_STACK_VAL @ 0x8 size 0xc00 : element size 0x8
u 0x8 0x8 MINI_STACK_VAL
! struct/union PCIE_DEVICE_SIZE size 0x20
p 0x8 0x8 PCIE_DEVICE_GUESTP
! struct/union STRAND_SIZE size 0x10ad0
uc 0x0 0x1 STRAND_ID
p 0x8 0x8 STRAND_CONFIGP
u 0x10 0x2 STRAND_CURRENT_SLOT
! array STRAND_SLOT @ 0x18 size 0x100 : element size 0x10
! struct STRAND_SLOT @ 0x18 has size 0x20
! struct STRAND_XCALL_MBOX @ 0x38 has size 0x48
! array STRAND_HV_TXMONDO @ 0x80 size 0x200 : element size 0x8
u 0x80 0x8 STRAND_HV_TXMONDO
! array STRAND_HV_RXMONDO @ 0xc0 size 0x200 : element size 0x8
u 0xc0 0x8 STRAND_HV_RXMONDO
u 0x100 0x8 STRAND_SCRUB_BASEPA
u 0x108 0x8 STRAND_SCRUB_SIZE
! struct STRAND_MINI_STACK @ 0x110 has size 0x188
! array STRAND_SCR @ 0x298 size 0x200 : element size 0x8
u 0x298 0x8 STRAND_SCR
! struct STRAND_CYCLIC @ 0x2d8 has size 0x248
u 0x520 0x8 STRAND_UE_TMP1
u 0x528 0x8 STRAND_UE_TMP2
u 0x530 0x8 STRAND_UE_TMP3
! array STRAND_UE_GLOBALS @ 0x538 size 0xc00 : element size 0x40
! struct STRAND_UE_GLOBALS @ 0x538 has size 0x180
u 0x6b8 0x8 STRAND_ERR_SEQ_NO
u 0x6c0 0x4 STRAND_ERR_FLAG
! array STRAND_DIAG_BUF @ 0x6c8 size 0x180 : element size 0x8
p 0x6c8 0x30 STRAND_DIAG_BUF
! array STRAND_SUN4V_RPRT_BUF @ 0x6f8 size 0x180 : element size 0x8
p 0x6f8 0x30 STRAND_SUN4V_RPRT_BUF
! array STRAND_ERR_TABLE_ENTRY @ 0x728 size 0x180 : element size 0x8
p 0x728 0x30 STRAND_ERR_TABLE_ENTRY
! array STRAND_ERR_ISFSR @ 0x758 size 0x180 : element size 0x8
u 0x758 0x8 STRAND_ERR_ISFSR
! array STRAND_ERR_DSFSR @ 0x788 size 0x180 : element size 0x8
u 0x788 0x8 STRAND_ERR_DSFSR
! array STRAND_ERR_DSFAR @ 0x7b8 size 0x180 : element size 0x8
u 0x7b8 0x8 STRAND_ERR_DSFAR
! array STRAND_ERR_DESR @ 0x7e8 size 0x180 : element size 0x8
u 0x7e8 0x8 STRAND_ERR_DESR
! array STRAND_ERR_DFESR @ 0x818 size 0x180 : element size 0x8
u 0x818 0x8 STRAND_ERR_DFESR
! array STRAND_ERR_RETURN_ADDR @ 0x848 size 0x180 : element size 0x8
u 0x848 0x8 STRAND_ERR_RETURN_ADDR
u 0x878 0x8 STRAND_IO_PROT
u 0x880 0x8 STRAND_IO_ERROR
u 0x888 0x8 STRAND_NRPENDING
u 0x890 0x8 STRAND_REROUTED_CPU
u 0x898 0x8 STRAND_REROUTED_EHDL
u 0x8a0 0x8 STRAND_REROUTED_ADDR
u 0x8a8 0x8 STRAND_REROUTED_STICK
u 0x8b0 0x8 STRAND_REROUTED_ATTR
u 0x8b8 0x8 STRAND_ABORT_PC
u 0x8c0 0x8 STRAND_ERR_GLOBALS_SAVED
u 0x8d0 0x8 STRAND_FAIL_TL
u 0x8d8 0x8 STRAND_FAIL_GL
! array STRAND_FAIL_TRAPSTATE @ 0x8e0 size 0x780 : element size 0x28
! struct STRAND_FAIL_TRAPSTATE @ 0x8e0 has size 0xf0
! array STRAND_FAIL_TRAPGLOBALS @ 0x9d0 size 0x600 : element size 0x40
! struct STRAND_FAIL_TRAPGLOBALS @ 0x9d0 has size 0xc0
! array STRAND_MRA @ 0xa90 size 0x200 : element size 0x8
u 0xa90 0x8 STRAND_MRA
! array STRAND_STACK @ 0xad0 size 0x80000 : element size 0x8
u 0xad0 0x8 STRAND_STACK
#define STRAND_SCR0 (STRAND_SCR + (0 * STRAND_SCR_INCR))
#define STRAND_SCR1 (STRAND_SCR + (1 * STRAND_SCR_INCR))
#define STRAND_SCR2 (STRAND_SCR + (2 * STRAND_SCR_INCR))
#define STRAND_SCR3 (STRAND_SCR + (3 * STRAND_SCR_INCR))
#define STRAND_FP_TMP1 STRAND_UE_TMP1
#define STRAND_FP_TMP2 STRAND_UE_TMP2
#define STRAND_FP_TMP3 STRAND_UE_TMP3
#define STRAND_ERR_ESR_INCR STRAND_ERR_ISFSR_INCR
#define CPU_SCR0 (CPU_SCR + (0 * CPU_SCR_INCR))
#define CPU_SCR1 (CPU_SCR + (1 * CPU_SCR_INCR))
#define CPU_SCR2 (CPU_SCR + (2 * CPU_SCR_INCR))
#define CPU_SCR3 (CPU_SCR + (3 * CPU_SCR_INCR))
#define ENDOFSTACK (STACK_VAL_INCR * (STACKDEPTH + 1))
#define TOP (CPU_STACK + STACK_TOP)
! struct/union MAPPING_SIZE size 0x20
! union MAPPING_ENTRY_ALIGNED @ 0x0 has size 0x10
! array MAPPING_ICPUSET @ 0x10 size 0x40 : element size 0x8
u 0x10 0x8 MAPPING_ICPUSET
! array MAPPING_DCPUSET @ 0x18 size 0x40 : element size 0x8
u 0x18 0x8 MAPPING_DCPUSET
! struct MAP_ENTRY_ALIGNED_DATA @ 0x0 has size 0x10
u 0x0 0x8 MAP_DATA_VA
u 0x8 0x8 MAP_DATA_TTE
#define MAPPING_VA (MAPPING_ENTRY_ALIGNED + MAP_ENTRY_ALIGNED_DATA + MAP_DATA_VA)
#define MAPPING_TTE (MAPPING_ENTRY_ALIGNED + MAP_ENTRY_ALIGNED_DATA + MAP_DATA_TTE)
! struct/union STACK_SIZE size 0x68
u 0x0 0x8 STACK_TOP
! array STACK_VAL @ 0x8 size 0x300 : element size 0x8
u 0x8 0x8 STACK_VAL
#define BANK_SHIFT 6
#define CPU_EVBSC_L2_AFSR(n) CPU_VBSC_ERPT + EVBSC_L2_AFSR + (n * EVBSC_L2_AFSR_INCR)
#define CPU_EVBSC_L2_AFAR(n) CPU_VBSC_ERPT + EVBSC_L2_AFAR + (n * EVBSC_L2_AFAR_INCR)
#define CPU_EVBSC_DRAM_AFSR(n) CPU_VBSC_ERPT + EVBSC_DRAM_AFSR + (n * EVBSC_DRAM_AFSR_INCR)
#define CPU_EVBSC_DRAM_AFAR(n) CPU_VBSC_ERPT + EVBSC_DRAM_AFAR + (n * EVBSC_DRAM_AFAR_INCR)
#define CPU_EVBSC_DRAM_CNTR(n) CPU_VBSC_ERPT + EVBSC_DRAM_CNTR + (n * EVBSC_DRAM_CNTR_INCR)
#define CPU_EVBSC_DRAM_LOC(n) CPU_VBSC_ERPT + EVBSC_DRAM_LOC + (n * EVBSC_DRAM_LOC_INCR)
#define CPU_EVBSC_DCACHE_DATA(n) DCACHE_DATA + (n * DCACHE_DATA_INCR)
#define CPU_EVBSC_ICACHE_DIAG_DATA(n) DIAG_BUF_ICACHE + ICACHE_DIAG_DATA + (n * ICACHE_DIAG_DATA_INCR)
! struct/union EPKTSIZE size 0x40
u 0x0 0x8 PCIERPT_SYSINO
u 0x8 0x8 PCIERPT_SUN4V_EHDL
u 0x10 0x8 PCIERPT_SUN4V_STICK
u 0x18 0x4 PCIERPT_SUN4V_DESC
u 0x1c 0x4 PCIERPT_SUN4V_SPECFIC
u 0x20 0x8 PCIERPT_WORD4
u 0x28 0x8 PCIERPT_HDR1
u 0x30 0x8 PCIERPT_HDR2
! struct/union DMU_ERR_SIZE size 0xa0
u 0x0 0x8 DMU_ERR_REPORT_TYPE_62
u 0x8 0x8 DMU_ERR_FPGA_TOD
u 0x10 0x8 DMU_ERR_EHDL
u 0x18 0x8 DMU_ERR_STICK
u 0x20 0x8 DMU_ERR_CPUVER
u 0x28 0x4 DMU_ERR_AGENTID
u 0x2c 0x4 DMU_ERR_MONDO_NUM
u 0x30 0x8 DMU_ERR_DMU_CORE_AND_BLOCK_ERR_STATUS
u 0x38 0x8 DMU_ERR_IMU_ERR_LOG_ENABLE
u 0x40 0x8 DMU_ERR_IMU_INTERRUPT_ENABLE
u 0x48 0x8 DMU_ERR_IMU_ENABLED_ERR_STATUS
u 0x50 0x8 DMU_ERR_IMU_ERR_STATUS_SET
u 0x58 0x8 DMU_ERR_IMU_SCS_ERR_LOG
u 0x60 0x8 DMU_ERR_IMU_EQS_ERR_LOG
u 0x68 0x8 DMU_ERR_IMU_RDS_ERR_LOG
u 0x70 0x8 DMU_ERR_MMU_ERR_LOG_ENABLE
u 0x78 0x8 DMU_ERR_MMU_INTR_ENABLE
u 0x80 0x8 DMU_ERR_MMU_INTR_STATUS
u 0x88 0x8 DMU_ERR_MMU_ERR_STATUS_SET
u 0x90 0x8 DMU_ERR_MMU_TRANSLATION_FAULT_ADDRESS
u 0x98 0x8 DMU_ERR_MMU_TRANSLATION_FAULT_STATUS
! struct/union PEU_ERR_SIZE size 0x120
u 0x0 0x8 PCIE_ERR_REPORT_TYPE_63
u 0x30 0x8 PEU_ERR_PEU_CORE_AND_BLOCK_INTR_ENABLE
u 0x38 0x8 PEU_ERR_PEU_CORE_AND_BLOCK_INTR_STATUS
u 0x40 0x8 PEU_ERR_ILU_ERR_LOG_ENABLE
u 0x48 0x8 PEU_ERR_ILU_INTR_ENABLE
u 0x50 0x8 PEU_ERR_ILU_INTR_STATUS
u 0x58 0x8 PEU_ERR_ILU_ERR_STATUS_SET
u 0x60 0x8 PEU_ERR_PEU_OTHER_EVENT_LOG_ENABLE
u 0x68 0x8 PEU_ERR_PEU_OTHER_EVENT_INTR_ENABLE
u 0x70 0x8 PEU_ERR_PEU_OTHER_EVENT_INTR_STATUS
u 0x78 0x8 PEU_ERR_PEU_OTHER_EVENT_STATUS_SET
u 0x80 0x8 PEU_ERR_PEU_RECEIVE_OTHER_EVENT_HEADER1_LOG
u 0x88 0x8 PEU_ERR_PEU_RECEIVE_OTHER_EVENT_HEADER2_LOG
u 0x90 0x8 PEU_ERR_PEU_TRANSMIT_OTHER_EVENT_HEADER1_LOG
u 0x98 0x8 PEU_ERR_PEU_TRANSMIT_OTHER_EVENT_HEADER2_LOG
u 0xa0 0x8 PEU_ERR_PEU_UE_LOG_ENABLE
u 0xa8 0x8 PEU_ERR_PEU_UE_INTERRUPT_ENABLE
u 0xb0 0x8 PEU_ERR_PEU_UE_STATUS
u 0xb8 0x8 PEU_ERR_PEU_UE_STATUS_SET
u 0xc0 0x8 PEU_ERR_PEU_RECEIVE_UE_HEADER1_LOG
u 0xc8 0x8 PEU_ERR_PEU_RECEIVE_UE_HEADER2_LOG
u 0xd0 0x8 PEU_ERR_PEU_TRANSMIT_UE_HEADER1_LOG
u 0xd8 0x8 PEU_ERR_PEU_TRANSMIT_UE_HEADER2_LOG
u 0xe0 0x8 PEU_ERR_PEU_CE_LOG_ENABLE
u 0xe8 0x8 PEU_ERR_PEU_CE_INTERRUPT_ENABLE
u 0xf0 0x8 PEU_ERR_PEU_CE_INTERRUPT_STATUS
u 0xf8 0x8 PEU_ERR_PEU_CE_STATUS_SET
u 0x100 0x8 PEU_ERR_PEU_CXPL_EVENT_ERROR_LOG_ENABLE
u 0x108 0x8 PEU_ERR_PEU_CXPL_EVENT_ERROR_INT_ENABLE
u 0x110 0x8 PEU_ERR_PEU_CXPL_EVENT_ERROR_INT_STATUS
u 0x118 0x8 PEU_ERR_PEU_CXPL_EVENT_ERROR_STATUS_SET
! struct/union PCIERPT_SIZE size 0x168
! struct PCI_ERPT_PCIEPKT @ 0x0 has size 0x40
! union PCI_ERPT_U @ 0x40 has size 0x120
s 0x160 0x4 PCI_UNSENT_PKT
#define PCIERPT_REPORT_TYPE_62 (PCI_ERPT_U + DMU_ERR_REPORT_TYPE_62)
#define PCIERPT_FPGA_TOD (PCI_ERPT_U + DMU_ERR_FPGA_TOD)
#define PCIERPT_EHDL (PCI_ERPT_U + DMU_ERR_EHDL)
#define PCIERPT_STICK (PCI_ERPT_U + DMU_ERR_STICK)
#define PCIERPT_CPUVER (PCI_ERPT_U + DMU_ERR_CPUVER )
#define PCIERPT_AGENTID (PCI_ERPT_U + DMU_ERR_AGENTID)
#define PCIERPT_MONDO_NUM (PCI_ERPT_U + DMU_ERR_MONDO_NUM)
#define PCIERPT_DMU_CORE_AND_BLOCK_ERR_STATUS (PCI_ERPT_U + DMU_ERR_DMU_CORE_AND_BLOCK_ERR_STATUS)
#define PCIERPT_IMU_ERR_LOG_ENABLE (PCI_ERPT_U + DMU_ERR_IMU_ERR_LOG_ENABLE)
#define PCIERPT_IMU_INTERRUPT_ENABLE (PCI_ERPT_U + DMU_ERR_IMU_INTERRUPT_ENABLE)
#define PCIERPT_IMU_ENABLED_ERR_STATUS (PCI_ERPT_U + DMU_ERR_IMU_ENABLED_ERR_STATUS)
#define PCIERPT_IMU_ERR_STATUS_SET (PCI_ERPT_U + DMU_ERR_IMU_ERR_STATUS_SET)
#define PCIERPT_IMU_SCS_ERR_LOG (PCI_ERPT_U + DMU_ERR_IMU_SCS_ERR_LOG)
#define PCIERPT_IMU_EQS_ERR_LOG (PCI_ERPT_U + DMU_ERR_IMU_EQS_ERR_LOG)
#define PCIERPT_IMU_RDS_ERR_LOG (PCI_ERPT_U + DMU_ERR_IMU_RDS_ERR_LOG)
#define PCIERPT_MMU_ERR_LOG_ENABLE (PCI_ERPT_U + DMU_ERR_MMU_ERR_LOG_ENABLE)
#define PCIERPT_MMU_INTR_ENABLE (PCI_ERPT_U + DMU_ERR_MMU_INTR_ENABLE)
#define PCIERPT_MMU_INTR_STATUS (PCI_ERPT_U + DMU_ERR_MMU_INTR_STATUS)
#define PCIERPT_MMU_ERR_STATUS_SET (PCI_ERPT_U + DMU_ERR_MMU_ERR_STATUS_SET)
#define PCIERPT_MMU_TRANSLATION_FAULT_ADDRESS (PCI_ERPT_U + DMU_ERR_MMU_TRANSLATION_FAULT_ADDRESS)
#define PCIERPT_MMU_TRANSLATION_FAULT_STATUS (PCI_ERPT_U + DMU_ERR_MMU_TRANSLATION_FAULT_STATUS)
#define PCIERPT_REPORT_TYPE_63 (PCI_ERPT_U + PCIE_ERR_REPORT_TYPE_63)
#define PCIERPT_PEU_CORE_AND_BLOCK_INTR_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_CORE_AND_BLOCK_INTR_ENABLE)
#define PCIERPT_PEU_CORE_AND_BLOCK_INTR_STATUS (PCI_ERPT_U + PEU_ERR_PEU_CORE_AND_BLOCK_INTR_STATUS)
#define PCIERPT_ILU_ERR_LOG_ENABLE (PCI_ERPT_U + PEU_ERR_ILU_ERR_LOG_ENABLE)
#define PCIERPT_ILU_INTR_ENABLE (PCI_ERPT_U + PEU_ERR_ILU_INTR_ENABLE)
#define PCIERPT_ILU_INTR_STATUS (PCI_ERPT_U + PEU_ERR_ILU_INTR_STATUS)
#define PCIERPT_ILU_ERR_STATUS_SET (PCI_ERPT_U + PEU_ERR_ILU_ERR_STATUS_SET)
#define PCIERPT_PEU_OTHER_EVENT_LOG_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_OTHER_EVENT_LOG_ENABLE)
#define PCIERPT_PEU_OTHER_EVENT_INTR_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_OTHER_EVENT_INTR_ENABLE)
#define PCIERPT_PEU_OTHER_EVENT_INTR_STATUS (PCI_ERPT_U + PEU_ERR_PEU_OTHER_EVENT_INTR_STATUS)
#define PCIERPT_PEU_OTHER_EVENT_STATUS_SET (PCI_ERPT_U + PEU_ERR_PEU_OTHER_EVENT_STATUS_SET)
#define PCIERPT_PEU_RECEIVE_OTHER_EVENT_HEADER1_LOG (PCI_ERPT_U + PEU_ERR_PEU_RECEIVE_OTHER_EVENT_HEADER1_LOG)
#define PCIERPT_PEU_RECEIVE_OTHER_EVENT_HEADER2_LOG (PCI_ERPT_U + PEU_ERR_PEU_RECEIVE_OTHER_EVENT_HEADER2_LOG)
#define PCIERPT_PEU_TRANSMIT_OTHER_EVENT_HEADER1_LOG (PCI_ERPT_U + PEU_ERR_PEU_TRANSMIT_OTHER_EVENT_HEADER1_LOG)
#define PCIERPT_PEU_TRANSMIT_OTHER_EVENT_HEADER2_LOG (PCI_ERPT_U + PEU_ERR_PEU_TRANSMIT_OTHER_EVENT_HEADER2_LOG)
#define PCIERPT_PEU_UE_LOG_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_UE_LOG_ENABLE)
#define PCIERPT_PEU_UE_INTERRUPT_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_UE_INTERRUPT_ENABLE)
#define PCIERPT_PEU_UE_STATUS (PCI_ERPT_U + PEU_ERR_PEU_UE_STATUS)
#define PCIERPT_PEU_UE_STATUS_SET (PCI_ERPT_U + PEU_ERR_PEU_UE_STATUS_SET)
#define PCIERPT_PEU_RECEIVE_UE_HEADER1_LOG (PCI_ERPT_U + PEU_ERR_PEU_RECEIVE_UE_HEADER1_LOG)
#define PCIERPT_PEU_RECEIVE_UE_HEADER2_LOG (PCI_ERPT_U + PEU_ERR_PEU_RECEIVE_UE_HEADER2_LOG)
#define PCIERPT_PEU_TRANSMIT_UE_HEADER1_LOG (PCI_ERPT_U + PEU_ERR_PEU_TRANSMIT_UE_HEADER1_LOG)
#define PCIERPT_PEU_TRANSMIT_UE_HEADER2_LOG (PCI_ERPT_U + PEU_ERR_PEU_TRANSMIT_UE_HEADER2_LOG)
#define PCIERPT_PEU_CE_LOG_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_CE_LOG_ENABLE)
#define PCIERPT_PEU_CE_INTERRUPT_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_CE_INTERRUPT_ENABLE)
#define PCIERPT_PEU_CE_INTERRUPT_STATUS (PCI_ERPT_U + PEU_ERR_PEU_CE_INTERRUPT_STATUS)
#define PCIERPT_PEU_CE_STATUS_SET (PCI_ERPT_U + PEU_ERR_PEU_CE_STATUS_SET)
#define PCIERPT_PEU_CXPL_EVENT_ERROR_LOG_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_CXPL_EVENT_ERROR_LOG_ENABLE)
#define PCIERPT_PEU_CXPL_EVENT_ERROR_INT_ENABLE (PCI_ERPT_U + PEU_ERR_PEU_CXPL_EVENT_ERROR_INT_ENABLE)
#define PCIERPT_PEU_CXPL_EVENT_ERROR_INT_STATUS (PCI_ERPT_U + PEU_ERR_PEU_CXPL_EVENT_ERROR_INT_STATUS)
#define PCIERPT_PEU_CXPL_EVENT_ERROR_STATUS_SET (PCI_ERPT_U + PEU_ERR_PEU_CXPL_EVENT_ERROR_STATUS_SET)
! struct/union LDC_CONSPKT_SIZE size 0x40
uc 0x0 0x1 LDC_CONS_TYPE
uc 0x1 0x1 LDC_CONS_SIZE
u 0x4 0x4 LDC_CONS_CTRL_MSG
! array LDC_CONS_PAYLOAD @ 0x8 size 0x1c0 : element size 0x1
uc 0x8 0x1 LDC_CONS_PAYLOAD
! struct/union CONSOLE_SIZE size 0x248
uc 0x0 0x1 CONS_TYPE
u 0x18 0x8 CONS_UARTBASE
uc 0x20 0x1 CONS_STATUS
u 0x28 0x8 CONS_ENDPT
u 0x30 0x8 CONS_INHEAD
u 0x38 0x8 CONS_INTAIL
p 0x40 0x8 CONS_VINTR_MAPREG
! array CONS_INBUF @ 0x48 size 0x1000 : element size 0x8
u 0x48 0x8 CONS_INBUF
! struct/union HVDISK_SIZE size 0x10
u 0x0 0x8 DISK_PA
u 0x8 0x8 DISK_SIZE
! struct/union LDC_ENDPOINT_SIZE size 0x110
uc 0x1 0x1 LDC_IS_LIVE
uc 0x2 0x1 LDC_IS_PRIVATE
uc 0x3 0x1 LDC_IS_SVC_ID
uc 0x4 0x1 LDC_RX_UPDATED
uc 0x5 0x1 LDC_TXQ_FULL
u 0x8 0x8 LDC_TX_QBASE_RA
u 0x10 0x8 LDC_TX_QBASE_PA
u 0x18 0x8 LDC_TX_QSIZE
u 0x20 0x4 LDC_TX_QHEAD
u 0x24 0x4 LDC_TX_QTAIL
u 0x28 0x8 LDC_TX_CB
u 0x30 0x8 LDC_TX_CBARG
! struct LDC_TX_MAPREG @ 0x38 has size 0x28
u 0x60 0x8 LDC_RX_QBASE_RA
u 0x68 0x8 LDC_RX_QBASE_PA
u 0x70 0x8 LDC_RX_QSIZE
u 0x78 0x4 LDC_RX_QHEAD
u 0x7c 0x4 LDC_RX_QTAIL
u 0x80 0x8 LDC_RX_CB
u 0x88 0x8 LDC_RX_CBARG
! struct LDC_RX_MAPREG @ 0x90 has size 0x28
p 0xb8 0x8 LDC_RX_VINTR_COOKIE
uc 0xc0 0x1 LDC_TARGET_TYPE
p 0xc8 0x8 LDC_TARGET_GUEST
u 0xd0 0x8 LDC_TARGET_CHANNEL
u 0xd8 0x8 LDC_MAP_TABLE_RA
u 0xe0 0x8 LDC_MAP_TABLE_PA
u 0xe8 0x8 LDC_MAP_TABLE_NENTRIES
u 0xf0 0x8 LDC_MAP_TABLE_SZ
! struct/union VERSION_SIZE size 0x10
u 0x0 0x8 VERSION_NUM
p 0x8 0x8 VERSION_PTR
#define VERSION_MAJOR (VERSION_NUM+MAJOR_OFF)
#define VERSION_MINOR (VERSION_NUM+MINOR_OFF)
! struct/union LDC_MAPREG_SIZE size 0x28
u 0x0 0x4 LDC_MAPREG_STATE
uc 0x4 0x1 LDC_MAPREG_VALID
u 0x8 0x8 LDC_MAPREG_INO
u 0x10 0x8 LDC_MAPREG_CPUP
u 0x18 0x8 LDC_MAPREG_COOKIE
u 0x20 0x8 LDC_MAPREG_ENDPOINT
u 0x0 0x8 WATCHDOG_TICKS
! struct/union LDC_I2E_SIZE size 0x10
p 0x0 0x8 LDC_I2E_ENDPOINT
p 0x8 0x8 LDC_I2E_MAPREG
! struct/union SP_LDC_ENDPOINT_SIZE size 0xe8
uc 0x0 0x1 LDC_CHANNEL_IDX
uc 0x1 0x1 SP_LDC_IS_LIVE
uc 0x2 0x1 SP_LDC_TARGET_TYPE
p 0x8 0x8 SP_LDC_TX_QD_PA
p 0x10 0x8 SP_LDC_RX_QD_PA
p 0x18 0x8 SP_LDC_TARGET_GUEST
u 0x20 0x8 SP_LDC_TARGET_CHANNEL
u 0x28 0x8 SP_LDC_TX_LOCK
u 0x30 0x8 SP_LDC_RX_LOCK
u 0x38 0x4 SP_LDC_TX_SCR_TXHEAD
u 0x3c 0x4 SP_LDC_TX_SCR_TXTAIL
u 0x40 0x8 SP_LDC_TX_SCR_TXSIZE
u 0x48 0x8 SP_LDC_TX_SCR_TX_QPA
u 0x50 0x4 SP_LDC_TX_SCR_RXHEAD
u 0x54 0x4 SP_LDC_TX_SCR_RXTAIL
u 0x58 0x8 SP_LDC_TX_SCR_RXSIZE
u 0x60 0x8 SP_LDC_TX_SCR_RX_QPA
u 0x68 0x8 SP_LDC_TX_SCR_TARGET
u 0x70 0x4 SP_LDC_RX_SCR_TXHEAD
u 0x74 0x4 SP_LDC_RX_SCR_TXTAIL
u 0x78 0x8 SP_LDC_RX_SCR_TXSIZE
u 0x80 0x8 SP_LDC_RX_SCR_TX_QPA
u 0x88 0x4 SP_LDC_RX_SCR_RXHEAD
u 0x8c 0x4 SP_LDC_RX_SCR_RXTAIL
u 0x90 0x8 SP_LDC_RX_SCR_RXSIZE
u 0x98 0x8 SP_LDC_RX_SCR_RX_QPA
u 0xa0 0x8 SP_LDC_RX_SCR_TARGET
! struct SP_LDC_RX_SCR_PKT @ 0xa8 has size 0x40
! struct/union SRAM_LDC_QENTRY_SIZE size 0x40
! array SRAM_LDC_PKT_DATA @ 0x0 size 0x200 : element size 0x8
u 0x0 0x8 SRAM_LDC_PKT_DATA
! struct/union SRAM_LDC_QD_SIZE size 0x140
uc 0x100 0x1 SRAM_LDC_HEAD
uc 0x101 0x1 SRAM_LDC_TAIL
uc 0x102 0x1 SRAM_LDC_STATE
uc 0x103 0x1 SRAM_LDC_STATE_UPDATED
uc 0x104 0x1 SRAM_LDC_STATE_NOTIFY
! struct/union LDC_MAPIN_SIZE size 0x30
u 0x0 0x8 LDC_MI_PA
u 0x8 0x8 LDC_MI_MMU_MAP
u 0x10 0x8 LDC_MI_IO_VA
u 0x18 0x8 LDC_MI_VA
u 0x20 0x2 LDC_MI_VA_CTX
u 0x22 0x2 LDC_MI_LOCAL_ENDPOINT
uc 0x24 0x1 LDC_MI_PG_SIZE
uc 0x25 0x1 LDC_MI_PERMS
u 0x28 0x4 LDC_MI_MAP_TABLE_IDX
#define LDC_MI_NEXT_IDX 0 /* clobber 1st word when free */
#define MIE_VA_MMU_SHIFT 0
#define MIE_RA_MMU_SHIFT 8
#define MIE_IO_MMU_SHIFT 16
#define LDC_MI_VA_MMU_MAP (LDC_MI_MMU_MAP + 7)
#define LDC_MI_RA_MMU_MAP (LDC_MI_MMU_MAP + 6)
#define LDC_MI_IO_MMU_MAP (LDC_MI_MMU_MAP + 5)
! struct/union GUEST_CONS_QUEUES_SIZE size 0x4000
! array GUEST_CONS_RXQ @ 0x0 size 0x10000 : element size 0x1
uc 0x0 0x1 GUEST_CONS_RXQ
! array GUEST_CONS_TXQ @ 0x2000 size 0x10000 : element size 0x1
uc 0x2000 0x1 GUEST_CONS_TXQ
! struct/union RA2PA_SEGMENT_SIZE size 0x20
u 0x0 0x8 RA2PA_SEGMENT_BASE
u 0x8 0x8 RA2PA_SEGMENT_LIMIT
u 0x10 0x8 RA2PA_SEGMENT_OFFSET
uc 0x18 0x1 RA2PA_SEGMENT_FLAGS
! struct/union GUEST_SIZE size 0x45910
u 0x0 0x8 GUEST_GID
p 0x8 0x8 GUEST_CONFIGP
u 0x10 0x4 GUEST_STATE
u 0x18 0x8 GUEST_STATE_LOCK
uc 0x20 0x1 GUEST_SOFT_STATE
! array GUEST_SOFT_STATE_STR @ 0x21 size 0x100 : element size 0x1
uc 0x21 0x1 GUEST_SOFT_STATE_STR
u 0x48 0x8 GUEST_SOFT_STATE_LOCK
u 0x50 0x8 GUEST_REAL_BASE
u 0x58 0x8 GUEST_REAL_LIMIT
u 0x60 0x8 GUEST_MEM_OFFSET
! array GUEST_RA2PA_SEGMENT @ 0x68 size 0x4000 : element size 0x20
! struct GUEST_RA2PA_SEGMENT @ 0x68 has size 0x800
u 0x868 0x8 GUEST_LDC_MAPIN_BASERA
u 0x870 0x8 GUEST_LDC_MAPIN_SIZE
u 0x878 0x8 GUEST_PERM_MAPPINGS_LOCK
! array GUEST_PERM_MAPPINGS @ 0x880 size 0x800 : element size 0x20
! struct GUEST_PERM_MAPPINGS @ 0x880 has size 0x100
! struct GUEST_CONSOLE @ 0x980 has size 0x248
u 0xbc8 0x8 GUEST_TOD_OFFSET
u 0xbd0 0x8 GUEST_TTRACE_FRZ
! array GUEST_VCPUS @ 0xbd8 size 0x1000 : element size 0x8
p 0xbd8 0x200 GUEST_VCPUS
! array GUEST_MAUS @ 0xdd8 size 0x200 : element size 0x8
p 0xdd8 0x40 GUEST_MAUS
! array GUEST_CWQS @ 0xe18 size 0x200 : element size 0x8
p 0xe18 0x40 GUEST_CWQS
! array GUEST_API_GROUPS @ 0xe58 size 0x680 : element size 0x10
! struct GUEST_API_GROUPS @ 0xe58 has size 0xd0
u 0xf28 0x8 GUEST_HCALL_TABLE
! array GUEST_DEV2INST @ 0xf30 size 0x100 : element size 0x1
uc 0xf30 0x1 GUEST_DEV2INST
! struct GUEST_VINO2INST @ 0xf50 has size 0x800
! struct GUEST_VDEV_STATE @ 0x1750 has size 0x1010
u 0x2760 0x8 GUEST_MD_PA
u 0x2768 0x8 GUEST_MD_SIZE
u 0x2770 0x8 GUEST_DUMPBUF_PA
u 0x2778 0x8 GUEST_DUMPBUF_RA
u 0x2780 0x8 GUEST_DUMPBUF_SIZE
u 0x2788 0x8 GUEST_ENTRY
u 0x2790 0x8 GUEST_ROM_BASE
u 0x2798 0x8 GUEST_ROM_SIZE
u 0x27a0 0x8 GUEST_PERFREG_ACCESSIBLE
u 0x27a8 0x8 GUEST_DIAGPRIV
u 0x27b0 0x8 GUEST_RESET_REASON
u 0x27b8 0x8 GUEST_PERFREGHT_ACCESSIBLE
u 0x27c0 0x8 GUEST_RNG_CTL_ACCESSIBLE
! struct GUEST_WATCHDOG @ 0x27c8 has size 0x8
! struct GUEST_DISK @ 0x27d0 has size 0x10
u 0x27e0 0x8 GUEST_LDC_MAX_CHANNEL_IDX
u 0x27e8 0x8 GUEST_LDC_MAPIN_FREE_IDX
! array GUEST_LDC_ENDPOINT @ 0x27f0 size 0x88000 : element size 0x110
! struct GUEST_LDC_ENDPOINT @ 0x27f0 has size 0x11000
! array GUEST_LDC_MAPIN @ 0x137f0 size 0x180000 : element size 0x30
! struct GUEST_LDC_MAPIN @ 0x137f0 has size 0x30000
! array GUEST_LDC_I2E @ 0x437f0 size 0x10000 : element size 0x10
! struct GUEST_LDC_I2E @ 0x437f0 has size 0x2000
! array GUEST_ASYNC_BUSY @ 0x45878 size 0x20 : element size 0x1
uc 0x45878 0x1 GUEST_ASYNC_BUSY
! array GUEST_ASYNC_LOCK @ 0x45880 size 0x100 : element size 0x8
u 0x45880 0x8 GUEST_ASYNC_LOCK
! array GUEST_ASYNC_BUF @ 0x458a0 size 0x200 : element size 0x8
u 0x458a0 0x8 GUEST_ASYNC_BUF
u 0x458e0 0x8 GUEST_START_STICK
! struct GUEST_UTIL @ 0x458e8 has size 0x10
! struct GUEST_MGUEST @ 0x45908 has size 0x8
! struct/union GUEST_UTIL_SIZE size 0x10
u 0x0 0x8 GUTIL_STICK_LAST
u 0x8 0x8 GUTIL_STOPPED_CYCLES
! struct/union HVCTL_RES_STATUS_SIZE size 0x38
u 0x0 0x4 HVCTL_RES_STATUS_RES
u 0x4 0x4 HVCTL_RES_STATUS_RESID
u 0x8 0x4 HVCTL_RES_STATUS_INFOID
u 0xc 0x4 HVCTL_RES_STATUS_CODE
! array HVCTL_RES_STATUS_DATA @ 0x10 size 0x140 : element size 0x1
uc 0x10 0x1 HVCTL_RES_STATUS_DATA
! struct/union RS_GUEST_SOFT_STATE_SIZE size 0x21
uc 0x0 0x1 RS_GUEST_SOFT_STATE
! array RS_GUEST_SOFT_STATE_STR @ 0x1 size 0x100 : element size 0x1
sc 0x1 0x1 RS_GUEST_SOFT_STATE_STR
! struct/union DEVOPSVEC_SIZE size 0x180
p 0x0 0x8 DEVOPSVEC_DEVINO2VINO
p 0x8 0x8 DEVOPSVEC_MONDO_RECEIVE
p 0x10 0x8 DEVOPSVEC_GETVALID
p 0x18 0x8 DEVOPSVEC_SETVALID
p 0x20 0x8 DEVOPSVEC_GETSTATE
p 0x28 0x8 DEVOPSVEC_SETSTATE
p 0x30 0x8 DEVOPSVEC_GETTARGET
p 0x38 0x8 DEVOPSVEC_SETTARGET
p 0x40 0x8 DEVOPSVEC_MAP
p 0x48 0x8 DEVOPSVEC_MAP_V2
p 0x50 0x8 DEVOPSVEC_GETMAP
p 0x58 0x8 DEVOPSVEC_GETMAP_V2
p 0x60 0x8 DEVOPSVEC_UNMAP
p 0x68 0x8 DEVOPSVEC_GETBYPASS
p 0x70 0x8 DEVOPSVEC_CONFIGGET
p 0x78 0x8 DEVOPSVEC_CONFIGPUT
p 0x80 0x8 DEVOPSVEC_IOPEEK
p 0x88 0x8 DEVOPSVEC_IOPOKE
p 0x90 0x8 DEVOPSVEC_DMASYNC
p 0x98 0x8 DEVOPSVEC_MSIQ_CONF
p 0xa0 0x8 DEVOPSVEC_MSIQ_INFO
p 0xa8 0x8 DEVOPSVEC_MSIQ_GETVALID
p 0xb0 0x8 DEVOPSVEC_MSIQ_SETVALID
p 0xb8 0x8 DEVOPSVEC_MSIQ_GETSTATE
p 0xc0 0x8 DEVOPSVEC_MSIQ_SETSTATE
p 0xc8 0x8 DEVOPSVEC_MSIQ_GETHEAD
p 0xd0 0x8 DEVOPSVEC_MSIQ_SETHEAD
p 0xd8 0x8 DEVOPSVEC_MSIQ_GETTAIL
p 0xe0 0x8 DEVOPSVEC_MSI_GETVALID
p 0xe8 0x8 DEVOPSVEC_MSI_SETVALID
p 0xf0 0x8 DEVOPSVEC_MSI_GETSTATE
p 0xf8 0x8 DEVOPSVEC_MSI_SETSTATE
p 0x100 0x8 DEVOPSVEC_MSI_GETMSIQ
p 0x108 0x8 DEVOPSVEC_MSI_SETMSIQ
p 0x110 0x8 DEVOPSVEC_MSI_MSG_GETMSIQ
p 0x118 0x8 DEVOPSVEC_MSI_MSG_SETMSIQ
p 0x120 0x8 DEVOPSVEC_MSI_MSG_GETVALID
p 0x128 0x8 DEVOPSVEC_MSI_MSG_SETVALID
p 0x130 0x8 DEVOPSVEC_GETPERFREG
p 0x138 0x8 DEVOPSVEC_SETPERFREG
p 0x140 0x8 DEVOPSVEC_VGETCOOKIE
p 0x148 0x8 DEVOPSVEC_VSETCOOKIE
p 0x150 0x8 DEVOPSVEC_VGETVALID
p 0x158 0x8 DEVOPSVEC_VSETVALID
p 0x160 0x8 DEVOPSVEC_VGETTARGET
p 0x168 0x8 DEVOPSVEC_VSETTARGET
p 0x170 0x8 DEVOPSVEC_VGETSTATE
p 0x178 0x8 DEVOPSVEC_VSETSTATE
! struct/union VINO2INST_SIZE size 0x800
! array VINO2INST_VINO @ 0x0 size 0x4000 : element size 0x1
uc 0x0 0x1 VINO2INST_VINO
! struct/union PIU_COOKIE_SIZE size 0x3c0
u 0x0 0x8 PIU_COOKIE_HANDLE
u 0x8 0x8 PIU_COOKIE_NCU
u 0x10 0x8 PIU_COOKIE_PCIE
u 0x18 0x8 PIU_COOKIE_CFG
u 0x30 0x8 PIU_COOKIE_PERFREGS
u 0x38 0x8 PIU_COOKIE_EQCTLSET
u 0x40 0x8 PIU_COOKIE_EQCTLCLR
u 0x48 0x8 PIU_COOKIE_EQSTATE
u 0x50 0x8 PIU_COOKIE_EQTAIL
u 0x58 0x8 PIU_COOKIE_EQHEAD
u 0x60 0x8 PIU_COOKIE_MSIMAP
u 0x68 0x8 PIU_COOKIE_MSICLR
u 0x70 0x8 PIU_COOKIE_MSGMAP
u 0x80 0x8 PIU_COOKIE_MMUFLUSH
u 0x88 0x8 PIU_COOKIE_INTCLR
u 0x90 0x8 PIU_COOKIE_INTMAP
p 0x98 0x8 PIU_COOKIE_VIRTUAL_INTMAP
u 0xa0 0x8 PIU_COOKIE_ERR_LOCK
u 0xa8 0x8 PIU_COOKIE_ERR_LOCK_COUNTER
u 0xb0 0x8 PIU_COOKIE_OE_STATUS
u 0xb8 0x2 PIU_COOKIE_INOMAX
u 0xba 0x2 PIU_COOKIE_VINO
p 0xc0 0x8 PIU_COOKIE_IOTSB0
p 0xc8 0x8 PIU_COOKIE_IOTSB1
p 0xd0 0x8 PIU_COOKIE_MSIEQBASE
p 0xd8 0x8 PIU_COOKIE_MSICOOKIE
p 0xe0 0x8 PIU_COOKIE_ERRCOOKIE
! struct PIU_COOKIE_DMU_ERPT @ 0xe8 has size 0x168
! struct PIU_COOKIE_PEU_ERPT @ 0x250 has size 0x168
#define PIU_COOKIE_BLACKLIST 0x3b8
! struct/union PIU_MSIEQ_SIZE size 0x28
u 0x0 0x8 PIU_MSIEQ_EQMASK
p 0x8 0x8 PIU_MSIEQ_BASE
p 0x10 0x8 PIU_MSIEQ_GUEST
u 0x18 0x8 PIU_MSIEQ_WORD0
u 0x20 0x8 PIU_MSIEQ_WORD1
! struct/union PIU_MSI_COOKIE_SIZE size 0x5a8
p 0x0 0x8 PIU_MSI_COOKIE_PIU
! array PIU_MSI_COOKIE_EQ @ 0x8 size 0x2d00 : element size 0x28
! struct PIU_MSI_COOKIE_EQ @ 0x8 has size 0x5a0
! struct/union PIU_ERR_COOKIE_SIZE size 0x18
p 0x0 0x8 PIU_ERR_COOKIE_PIU
! array PIU_ERR_COOKIE_STATE @ 0x8 size 0x80 : element size 0x8
u 0x8 0x8 PIU_ERR_COOKIE_STATE
! struct/union VDEV_STATE_SIZE size 0x1010
u 0x0 0x8 VDEV_STATE_HANDLE
! array VDEV_STATE_MAPREG @ 0x8 size 0x8000 : element size 0x40
! struct VDEV_STATE_MAPREG @ 0x8 has size 0x1000
u 0x1008 0x2 VDEV_STATE_INOMAX
u 0x100a 0x2 VDEV_STATE_VINOBASE
u 0x0 0x8 SVC_LINK_SIZE
u 0x8 0x8 SVC_LINK_PA
p 0x10 0x8 SVC_LINK_NEXT
u 0x0 0x8 SVC_CALLBACK_RX
u 0x8 0x8 SVC_CALLBACK_TX
u 0x10 0x8 SVC_CALLBACK_COOKIE
! struct/union SVC_CTRL_SIZE size 0x80
u 0x0 0x4 SVC_CTRL_XID
u 0x4 0x4 SVC_CTRL_SID
u 0x8 0x4 SVC_CTRL_INO
u 0xc 0x4 SVC_CTRL_MTU
u 0x10 0x4 SVC_CTRL_CONFIG
u 0x14 0x4 SVC_CTRL_STATE
u 0x18 0x4 SVC_CTRL_COUNT
u 0x1c 0x4 SVC_CTRL_DSTATE
u 0x20 0x8 SVC_CTRL_LOCK
u 0x28 0x8 SVC_CTRL_INTR_COOKIE
! struct SVC_CTRL_CALLBACK @ 0x30 has size 0x18
p 0x48 0x8 SVC_CTRL_LINK
! struct SVC_CTRL_RECV @ 0x50 has size 0x18
! struct SVC_CTRL_SEND @ 0x68 has size 0x18
! struct/union HV_SVC_DATA_SIZE size 0x4e0
u 0x0 0x8 HV_SVC_DATA_RXBASE
u 0x8 0x8 HV_SVC_DATA_TXBASE
u 0x10 0x8 HV_SVC_DATA_RXCHANNEL
u 0x18 0x8 HV_SVC_DATA_TXCHANNEL
! array HV_SVC_DATA_SCR @ 0x20 size 0x80 : element size 0x8
u 0x20 0x8 HV_SVC_DATA_SCR
u 0x30 0x4 HV_SVC_DATA_NUM_SVCS
u 0x34 0x4 HV_SVC_DATA_SENDBUSY
p 0x38 0x8 HV_SVC_DATA_SENDH
p 0x40 0x8 HV_SVC_DATA_SENDT
p 0x48 0x8 HV_SVC_DATA_SENDDH
p 0x50 0x8 HV_SVC_DATA_SENDDT
u 0x58 0x8 HV_SVC_DATA_LOCK
! array HV_SVC_DATA_SVC @ 0x60 size 0x2400 : element size 0x80
! struct HV_SVC_DATA_SVC @ 0x60 has size 0x480
! struct/union SVC_PKT_SIZE size 0x8
u 0x0 0x4 SVC_PKT_XID
u 0x4 0x2 SVC_PKT_SUM
u 0x6 0x2 SVC_PKT_SID
! struct/union MAPREG_SIZE size 0x40
uc 0x0 0x1 MAPREG_STATE
uc 0x1 0x1 MAPREG_VALID
u 0x2 0x2 MAPREG_PCPU
u 0x4 0x2 MAPREG_VCPU
uc 0x6 0x1 MAPREG_INO
u 0x8 0x8 MAPREG_DATA0
u 0x10 0x8 MAPREG_DEVCOOKIE
u 0x18 0x8 MAPREG_GETSTATE
u 0x20 0x8 MAPREG_SETSTATE
! struct/union DTHDR_SIZE size 0x10
u 0x0 0x4 DTHDR_VER
u 0x4 0x4 DTHDR_NODESZ
u 0x8 0x4 DTHDR_NAMES
u 0xc 0x4 DTHDR_DATA
! struct/union DTNODE_SIZE size 0x10
uc 0x0 0x1 DTNODE_TAG
! union DTNODE_DATA @ 0x8 has size 0x8
! struct/union TRAPGLOBALS_SIZE size 0x40
! array G @ 0x0 size 0x200 : element size 0x8
u 0x0 0x8 G
! struct/union TRAPSTATE_SIZE size 0x28
u 0x0 0x8 TRAPSTATE_HTSTATE
u 0x8 0x8 TRAPSTATE_TSTATE
u 0x10 0x8 TRAPSTATE_TT
u 0x18 0x8 TRAPSTATE_TPC
u 0x20 0x8 TRAPSTATE_TNPC
! struct/union DBGERROR_PAYLOAD_SIZE size 0x1f8
! array DBGERROR_DATA @ 0x0 size 0xfc0 : element size 0x8
u 0x0 0x8 DBGERROR_DATA
! struct/union DBGERROR_SIZE size 0x200
u 0x0 0x8 DBGERROR_ERROR_SVCH
! struct DBGERROR_PAYLOAD @ 0x8 has size 0x1f8
! struct/union DEVINST_SIZE size 0x10
p 0x0 0x8 DEVINST_COOKIE
p 0x8 0x8 DEVINST_OPS
! struct/union ERPT_SVC_PKT_SIZE size 0x10
u 0x0 0x8 ERPT_PKT_ADDR
u 0x8 0x8 ERPT_PKT_SIZE
! struct/union MAU_QUEUE_SIZE size 0x50
u 0x0 0x8 MQ_LOCK
u 0x8 0x4 MQ_STATE
u 0xc 0x4 MQ_BUSY
u 0x10 0x8 MQ_BASE
u 0x18 0x8 MQ_BASE_RA
u 0x20 0x8 MQ_END
u 0x28 0x8 MQ_HEAD
u 0x30 0x8 MQ_HEAD_MARKER
u 0x38 0x8 MQ_TAIL
u 0x40 0x8 MQ_NENTRIES
u 0x48 0x8 MQ_CPU_PID
! struct/union CWQ_QUEUE_SIZE size 0x10d0
u 0x0 0x8 CQ_LOCK
u 0x8 0x4 CQ_STATE
u 0xc 0x4 CQ_BUSY
u 0x10 0x8 CQ_DR_BASE_RA
u 0x18 0x8 CQ_DR_BASE
u 0x20 0x8 CQ_DR_LAST
u 0x28 0x8 CQ_DR_HEAD
u 0x30 0x8 CQ_DR_TAIL
u 0x38 0x8 CQ_BASE
u 0x40 0x8 CQ_LAST
u 0x48 0x8 CQ_HEAD
u 0x50 0x8 CQ_HEAD_MARKER
u 0x58 0x8 CQ_TAIL
u 0x60 0x8 CQ_NENTRIES
u 0x68 0x8 CQ_CPU_PID
u 0x70 0x8 CQ_SCR1
u 0x78 0x8 CQ_SCR2
u 0x80 0x8 CQ_SCR3
u 0x88 0x8 CQ_DR_HV_OFFSET
! array CQ_HV_CWS @ 0x90 size 0x8200 : element size 0x40
! struct CQ_HV_CWS @ 0x90 has size 0x1040
! struct/union NCS_HVDESC_SIZE size 0x40
u 0x0 0x8 NHD_STATE
u 0x8 0x8 NHD_TYPE
! struct NHD_REGS @ 0x10 has size 0x20
u 0x30 0x8 NHD_ERRSTATUS
! struct/union MA_REGS_SIZE size 0x20
! union MR_CTL @ 0x0 has size 0x8
! union MR_MPA @ 0x8 has size 0x8
! union MR_MA @ 0x10 has size 0x8
u 0x18 0x8 MR_NP
! struct/union NCS_QCONF_ARG_SIZE size 0x20
u 0x0 0x8 NQ_MID
u 0x8 0x8 NQ_BASE
u 0x10 0x8 NQ_END
u 0x18 0x8 NQ_NENTRIES
! struct/union NCS_QTAIL_UPDATE_ARG_SIZE size 0x18
u 0x0 0x8 NU_MID
u 0x8 0x8 NU_TAIL
u 0x10 0x8 NU_SYNCFLAG
! struct/union CWQ_CW_RET_SIZE size 0x8
u 0x0 0x8 CW_RET_DST_ADDR
u 0x0 0x8 CW_RET_CSR
! struct/union CWQ_CW_SIZE size 0x40
u 0x0 0x8 CW_CTLBITS
u 0x8 0x8 CW_SRC_ADDR
u 0x10 0x8 CW_AUTH_KEY_ADDR
u 0x18 0x8 CW_AUTH_IV_ADDR
u 0x20 0x8 CW_FINAL_AUTH_STATE_ADDR
u 0x28 0x8 CW_ENC_KEY_ADDR
u 0x30 0x8 CW_ENC_IV_ADDR
! union CW_RET @ 0x38 has size 0x8
#define CW_DST_ADDR (CW_RET + CW_RET_DST_ADDR)
#define CW_CSR (CW_RET + CW_RET_DST_ADDR)
! struct/union CRYPTO_INTR_SIZE size 0x18
u 0x0 0x8 CI_COOKIE
u 0x8 0x8 CI_ACTIVE
u 0x10 0x8 CI_DATA
! struct/union RNG_CTLREGS_SIZE size 0x20
u 0x0 0x8 RNG_CTLREGS_REG0
u 0x8 0x8 RNG_CTLREGS_REG1
u 0x10 0x8 RNG_CTLREGS_REG2
u 0x18 0x8 RNG_CTLREGS_REG3
! struct/union RNG_CTLDATA_SIZE size 0x38
! struct RNG_CTLDATA_REGS @ 0x0 has size 0x20
u 0x20 0x8 RNG_CTLDATA_STATE
u 0x28 0x8 RNG_CTLDATA_GUESTID
u 0x30 0x8 RNG_CTLDATA_READYTIME
! struct/union SVCCN_PKT_SIZE size 0x3
uc 0x0 0x1 SVCCN_PKT_TYPE
uc 0x1 0x1 SVCCN_PKT_LEN
! array SVCCN_PKT_DATA @ 0x2 size 0x8 : element size 0x1
uc 0x2 0x1 SVCCN_PKT_DATA
! struct/union VBSC_CTRL_PKT_SIZE size 0x20
u 0x0 0x8 VBSC_PKT_CMD
u 0x8 0x8 VBSC_PKT_ARG0
u 0x10 0x8 VBSC_PKT_ARG1
u 0x18 0x8 VBSC_PKT_ARG2
! struct/union CB_SIZE size 0x20
u 0x0 0x8 CB_TICK
u 0x8 0x8 CB_HANDLER
u 0x10 0x8 CB_ARG0
u 0x18 0x8 CB_ARG1
! struct/union CY_SIZE size 0x248
u 0x0 0x8 CY_T0
! array CY_CB @ 0x8 size 0x1100 : element size 0x20
! struct CY_CB @ 0x8 has size 0x220
u 0x228 0x8 CY_TICK
u 0x230 0x8 CY_HANDLER
u 0x238 0x8 CY_ARG0
u 0x240 0x8 CY_ARG1
#define STRAND_CY_T0 (STRAND_CYCLIC + CY_T0)
#define STRAND_CY_CB (STRAND_CYCLIC + CY_CB)
#define STRAND_CY_TICK (STRAND_CYCLIC + CY_TICK)
#define STRAND_CY_HANDLER (STRAND_CYCLIC + CY_HANDLER)
#define STRAND_CY_ARG0 (STRAND_CYCLIC + CY_ARG0)
#define STRAND_CY_ARG1 (STRAND_CYCLIC + CY_ARG1)
#define STRAND_CY_CB_TICK (STRAND_CYCLIC + CY_CB + CB_TICK)
#define STRAND_CY_CB_HANDLER (STRAND_CYCLIC + CY_CB + CB_HANDLER)
#define STRAND_CY_CB_ARG0 (STRAND_CYCLIC + CY_CB + CB_ARG0)
#define STRAND_CY_CB_ARG1 (STRAND_CYCLIC + CY_CB + CB_ARG1)
#define CB_LAST ((N_CB - 1) * CB_SIZE)
#define STRAND_CY_CB_LAST_TICK (STRAND_CY_CB_TICK + CB_LAST)
! struct/union ERROR_TABLE_ENTRY_SIZE size 0x48
! array ERR_NAME @ 0x0 size 0x80 : element size 0x1
sc 0x0 0x1 ERR_NAME
p 0x10 0x8 ERR_REPORT_FCN
p 0x18 0x8 ERR_GUEST_REPORT_FCN
p 0x20 0x8 ERR_CORRECT_FCN
p 0x28 0x8 ERR_STORM_FCN
p 0x30 0x8 ERR_PRINT_FCN
u 0x38 0x4 ERR_FLAGS
uc 0x3c 0x1 ERR_SUN4V_RPRT_TYPE
uc 0x3d 0x1 ERR_SUN4V_EDESC
u 0x40 0x4 ERR_REPORT_SIZE
! struct/union ERR_WAY_SIZE size 0x88
u 0x0 0x8 ERR_WAY_TAG_AND_ECC
! array ERR_WAY_DATA_AND_ECC @ 0x8 size 0x400 : element size 0x8
u 0x8 0x8 ERR_WAY_DATA_AND_ECC
! struct/union ERR_L2_SIZE size 0x8d0
u 0x0 0x8 ERR_L2_VDBITS
u 0x8 0x8 ERR_L2_UABITS
! array ERR_L2_WAYS @ 0x10 size 0x4400 : element size 0x88
! struct ERR_L2_WAYS @ 0x10 has size 0x880
! array ERR_DRAM_CONTENTS @ 0x890 size 0x200 : element size 0x8
u 0x890 0x8 ERR_DRAM_CONTENTS
! struct/union ERR_TLB_SIZE size 0x10
u 0x0 0x8 ERR_TLB_TAG
u 0x8 0x8 ERR_TLB_DATA
! struct/union ERR_ICACHE_WAY_SIZE size 0x48
! array ERR_ICACHE_WAY_INSTR @ 0x0 size 0x200 : element size 0x8
u 0x0 0x8 ERR_ICACHE_WAY_INSTR
u 0x40 0x8 ERR_ICACHE_WAY_TAG
! struct/union ERR_ICACHE_SIZE size 0x240
! array ERR_ICACHE_WAY @ 0x0 size 0x1200 : element size 0x48
! struct ERR_ICACHE_WAY @ 0x0 has size 0x240
! struct/union ERR_DCACHE_WAY_SIZE size 0x18
! array ERR_DCACHE_WAY_DATA @ 0x0 size 0x80 : element size 0x8
u 0x0 0x8 ERR_DCACHE_WAY_DATA
u 0x10 0x8 ERR_DCACHE_WAY_TAG
! struct/union ERR_DCACHE_SIZE size 0x60
! array ERR_DCACHE_WAY @ 0x0 size 0x300 : element size 0x18
! struct ERR_DCACHE_WAY @ 0x0 has size 0x60
! struct/union ERR_SSI_SIZE size 0x10
u 0x0 0x8 ERR_SSI_TIMEOUT
u 0x8 0x8 ERR_SSI_LOG
! struct/union ERR_STB_SIZE size 0x28
u 0x0 0x8 ERR_STB_DATA
u 0x8 0x8 ERR_STB_DATA_ECC
u 0x10 0x8 ERR_STB_PARITY
u 0x18 0x8 ERR_STB_MARKS
u 0x20 0x8 ERR_STB_CURR_PTR
! struct/union ERR_SCRATCHPAD_SIZE size 0x10
u 0x0 0x8 ERR_SCRATCHPAD_DATA
u 0x8 0x8 ERR_SCRATCHPAD_ECC
! struct/union ERR_TCA_SIZE size 0x10
u 0x0 0x8 ERR_TCA_DATA
u 0x8 0x8 ERR_TCA_ECC
! struct/union ERR_REG_SIZE size 0x8
u 0x0 0x8 ERR_REG_ECC
! struct/union ERR_TSA_SIZE size 0x78
u 0x0 0x8 ERR_TSA_ECC
u 0x8 0x8 ERR_TSA_TL
u 0x10 0x8 ERR_TSA_TT
u 0x18 0x8 ERR_TSA_TSTATE
u 0x20 0x8 ERR_TSA_HTSTATE
u 0x28 0x8 ERR_TSA_TPC
u 0x30 0x8 ERR_TSA_TNPC
u 0x38 0x8 ERR_TSA_CPU_MONDO_QHEAD
u 0x40 0x8 ERR_TSA_CPU_MONDO_QTAIL
u 0x48 0x8 ERR_TSA_DEV_MONDO_QHEAD
u 0x50 0x8 ERR_TSA_DEV_MONDO_QTAIL
u 0x58 0x8 ERR_TSA_ERR_RES_QHEAD
u 0x60 0x8 ERR_TSA_ERR_RES_QTAIL
u 0x68 0x8 ERR_TSA_ERR_NONRES_QHEAD
u 0x70 0x8 ERR_TSA_ERR_NONRES_QTAIL
! struct/union ERR_MMU_ERR_REGS_SIZE size 0x88
! array ERR_MMU_PARITY @ 0x0 size 0x40 : element size 0x1
uc 0x0 0x1 ERR_MMU_PARITY
! array ERR_MMU_TSB_CFG_CTX0 @ 0x8 size 0x100 : element size 0x8
u 0x8 0x8 ERR_MMU_TSB_CFG_CTX0
! array ERR_MMU_TSB_CFG_CTXNZ @ 0x28 size 0x100 : element size 0x8
u 0x28 0x8 ERR_MMU_TSB_CFG_CTXNZ
! array ERR_MMU_REAL_RANGE @ 0x48 size 0x100 : element size 0x8
u 0x48 0x8 ERR_MMU_REAL_RANGE
! array ERR_MMU_PHYS_OFFSET @ 0x68 size 0x100 : element size 0x8
u 0x68 0x8 ERR_MMU_PHYS_OFFSET
! struct/union ERR_MAMU_SIZE size 0x28
u 0x0 0x8 ERR_MA_PA
u 0x8 0x8 ERR_MA_ADDR
u 0x10 0x8 ERR_MA_NP
u 0x18 0x8 ERR_MA_CTL
u 0x20 0x8 ERR_MA_SYNC
! struct/union ERR_TRAP_REGS_SIZE size 0x28
u 0x0 0x8 ERR_TT
u 0x8 0x8 ERR_TPC
u 0x10 0x8 ERR_TNPC
u 0x18 0x8 ERR_TSTATE
u 0x20 0x8 ERR_HTSTATE
! struct/union ERR_SOC_SIZE size 0x48
u 0x0 0x8 ERR_SOC_ESR
u 0x8 0x8 ERR_SOC_ELER
u 0x10 0x8 ERR_SOC_EIER
u 0x18 0x8 ERR_SOC_VCID
u 0x20 0x8 ERR_SOC_FEER
u 0x28 0x8 ERR_SOC_PESR
u 0x30 0x8 ERR_SOC_EIR
u 0x38 0x8 ERR_SOC_SII_SYND
u 0x40 0x8 ERR_SOC_NCU_SYND
! struct/union ERR_DIAG_DATA_SIZE size 0x8d0
! array ERR_DIAG_DATA_DTLB @ 0x0 size 0x4000 : element size 0x10
! struct ERR_DIAG_DATA_DTLB @ 0x0 has size 0x800
! array ERR_DIAG_DATA_ITLB @ 0x0 size 0x2000 : element size 0x10
! struct ERR_DIAG_DATA_ITLB @ 0x0 has size 0x400
! struct ERR_DIAG_DATA_ICACHE @ 0x0 has size 0x240
! struct ERR_DIAG_DATA_DCACHE @ 0x0 has size 0x60
! struct ERR_DIAG_DATA_SSI_INFO @ 0x0 has size 0x10
! struct ERR_DIAG_DATA_STB @ 0x0 has size 0x28
! struct ERR_DIAG_DATA_SCRATCHPAD @ 0x0 has size 0x10
! struct ERR_DIAG_DATA_TSA @ 0x0 has size 0x78
! struct ERR_DIAG_DATA_MMU_REGS @ 0x0 has size 0x88
! struct ERR_DIAG_DATA_MAMU @ 0x0 has size 0x28
! struct ERR_DIAG_DATA_SOC @ 0x0 has size 0x48
! struct ERR_DIAG_DATA_TCA @ 0x0 has size 0x10
! struct ERR_DIAG_DATA_REG @ 0x0 has size 0x8
! struct ERR_DIAG_DATA_L2_CACHE @ 0x0 has size 0x8d0
! array ERR_DIAG_DATA_TRAP_REGS @ 0x0 size 0x780 : element size 0x28
! struct ERR_DIAG_DATA_TRAP_REGS @ 0x0 has size 0xf0
uc 0x0 0x1 ERR_DIAG_DATA_REG_INFO
! struct/union ERR_ABORT_DATA_SIZE size 0x800
! array ERR_ABORT_VERSION @ 0x0 size 0x200 : element size 0x1
uc 0x0 0x1 ERR_ABORT_VERSION
u 0x40 0x8 ERR_ABORT_PC
u 0x48 0x8 ERR_ABORT_CWP
! array ERR_ABORT_TRAP_REGS @ 0x50 size 0x780 : element size 0x28
! struct ERR_ABORT_TRAP_REGS @ 0x50 has size 0xf0
! array ERR_ABORT_GLOBAL_REGS @ 0x140 size 0x600 : element size 0x8
u 0x140 0x8 ERR_ABORT_GLOBAL_REGS
! array ERR_ABORT_REG_WINDOWS @ 0x200 size 0x3000 : element size 0x8
u 0x200 0x8 ERR_ABORT_REG_WINDOWS
! struct/union ERR_DIAG_BUF_SIZE size 0xa98
u 0x0 0x8 ERR_DIAG_BUF_SPARC_ISFSR
u 0x8 0x8 ERR_DIAG_BUF_SPARC_DSFSR
u 0x10 0x8 ERR_DIAG_BUF_SPARC_DSFAR
u 0x18 0x8 ERR_DIAG_BUF_SPARC_DESR
u 0x20 0x8 ERR_DIAG_BUF_SPARC_DFESR
! array ERR_DIAG_BUF_L2_CACHE_ESR @ 0x28 size 0x200 : element size 0x8
u 0x28 0x8 ERR_DIAG_BUF_L2_CACHE_ESR
! array ERR_DIAG_BUF_L2_CACHE_EAR @ 0x68 size 0x200 : element size 0x8
u 0x68 0x8 ERR_DIAG_BUF_L2_CACHE_EAR
! array ERR_DIAG_BUF_L2_CACHE_ND @ 0xa8 size 0x200 : element size 0x8
u 0xa8 0x8 ERR_DIAG_BUF_L2_CACHE_ND
! array ERR_DIAG_BUF_DRAM_ESR @ 0xe8 size 0x100 : element size 0x8
u 0xe8 0x8 ERR_DIAG_BUF_DRAM_ESR
! array ERR_DIAG_BUF_DRAM_EAR @ 0x108 size 0x100 : element size 0x8
u 0x108 0x8 ERR_DIAG_BUF_DRAM_EAR
! array ERR_DIAG_BUF_DRAM_CTR @ 0x128 size 0x100 : element size 0x8
u 0x128 0x8 ERR_DIAG_BUF_DRAM_CTR
! array ERR_DIAG_BUF_DRAM_LOC @ 0x148 size 0x100 : element size 0x8
u 0x148 0x8 ERR_DIAG_BUF_DRAM_LOC
! array ERR_DIAG_BUF_DRAM_FBD @ 0x168 size 0x100 : element size 0x8
u 0x168 0x8 ERR_DIAG_BUF_DRAM_FBD
! array ERR_DIAG_BUF_DRAM_RETRY @ 0x188 size 0x100 : element size 0x8
u 0x188 0x8 ERR_DIAG_BUF_DRAM_RETRY
u 0x1a8 0x8 ERR_DIAG_L2_BANK
u 0x1b0 0x8 ERR_DIAG_L2_LINE_STATE
u 0x1b8 0x8 ERR_DIAG_L2_PA
! union ERR_DIAG_BUF_DIAG_DATA @ 0x1c0 has size 0x8d0
u 0xa90 0x4 ERR_DIAG_BUF_RPRT_IN_USE
u 0xa94 0x4 ERR_DIAG_BUF_RPRT_SIZE
! struct/union CPU_SUN4V_RPRT_SIZE size 0x40
u 0x0 0x8 CPU_SUN4V_RPRT_G_EHDL
u 0x8 0x8 CPU_SUN4V_RPRT_G_STICK
u 0x10 0x4 CPU_SUN4V_RPRT_EDESC
u 0x14 0x4 CPU_SUN4V_RPRT_ATTR
u 0x18 0x8 CPU_SUN4V_RPRT_ADDR
u 0x20 0x4 CPU_SUN4V_RPRT_SZ
u 0x24 0x2 CPU_SUN4V_RPRT_G_CPUID
u 0x26 0x2 CPU_SUN4V_RPRT_G_SECS
uc 0x28 0x1 CPU_SUN4V_RPRT_ASI
u 0x2a 0x2 CPU_SUN4V_RPRT_REG
u 0x2c 0x4 CPU_SUN4V_RPRT_WORD6
u 0x30 0x8 CPU_SUN4V_RPRT_WORD7
u 0x38 0x8 CPU_SUN4V_RPRT_WORD8
#define ESUN4V_G_EHDL CPU_SUN4V_RPRT_G_EHDL
#define ESUN4V_G_STICK CPU_SUN4V_RPRT_G_STICK
#define ESUN4V_EDESC CPU_SUN4V_RPRT_EDESC
#define ESUN4V_ATTR CPU_SUN4V_RPRT_ATTR
#define ESUN4V_ADDR CPU_SUN4V_RPRT_ADDR
#define ESUN4V_SZ CPU_SUN4V_RPRT_SZ
#define ESUN4V_G_CPUID CPU_SUN4V_RPRT_G_CPUID
#define ESUN4V_G_SECS CPU_SUN4V_RPRT_G_SECS
! struct/union ERR_SUN4V_RPRT_SIZE size 0x48
! union ERR_SUN4V_CPU_ERPT @ 0x0 has size 0x40
u 0x40 0x8 ERR_SUN4V_RPRT_IN_USE
#define ERR_SUN4V_PCIE_ERPT ERR_SUN4V_CPU_ERPT
#define ERR_SUN4V_RPRT_G_EHDL (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_G_EHDL)
#define ERR_SUN4V_RPRT_G_STICK (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_G_STICK)
#define ERR_SUN4V_RPRT_EDESC (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_EDESC)
#define ERR_SUN4V_RPRT_ATTR (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_ATTR)
#define ERR_SUN4V_RPRT_ADDR (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_ADDR)
#define ERR_SUN4V_RPRT_SZ (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_SZ)
#define ERR_SUN4V_RPRT_G_CPUID (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_G_CPUID)
#define ERR_SUN4V_RPRT_G_SECS (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_G_SECS)
#define ERR_SUN4V_RPRT_ASI (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_ASI)
#define ERR_SUN4V_RPRT_REG (ERR_SUN4V_CPU_ERPT + CPU_SUN4V_RPRT_REG)
#define ERR_SUN4V_PCIE_SYSINO (ERR_SUN4V_PCIE_ERPT + PCIERPT_SYSINO)
#define ERR_SUN4V_PCIE_EHDL (ERR_SUN4V_PCIE_ERPT + PCIERPT_SUN4V_EHDL)
#define ERR_SUN4V_PCIE_STICK (ERR_SUN4V_PCIE_ERPT + PCIERPT_SUN4V_STICK)
#define ERR_SUN4V_PCIE_DESC (ERR_SUN4V_PCIE_ERPT + PCIERPT_SUN4V_DESC)
#define ERR_SUN4V_PCIE_SPECIFIC (ERR_SUN4V_PCIE_ERPT + PCIERPT_SUN4V_SPECFIC)
#define ERR_SUN4V_PCIE_WORD4 (ERR_SUN4V_PCIE_ERPT + PCIERPT_WORD4)
#define ERR_SUN4V_PCIE_HDR1 (ERR_SUN4V_PCIE_ERPT + PCIERPT_HDR1)
#define ERR_SUN4V_PCIE_HDR2 (ERR_SUN4V_PCIE_ERPT + PCIERPT_HDR2)
! struct/union ERR_DIAG_RPRT_SIZE size 0xaf0
u 0x0 0x8 ERR_DIAG_RPRT_ERROR_TYPE
u 0x8 0x8 ERR_DIAG_RPRT_REPORT_TYPE
u 0x10 0x8 ERR_DIAG_RPRT_TOD
u 0x18 0x8 ERR_DIAG_RPRT_EHDL
u 0x20 0x8 ERR_DIAG_RPRT_ERR_STICK
u 0x28 0x8 ERR_DIAG_RPRT_CPUVER
u 0x30 0x8 ERR_DIAG_RPRT_SERIAL
u 0x38 0x8 ERR_DIAG_RPRT_TSTATE
u 0x40 0x8 ERR_DIAG_RPRT_HTSTATE
u 0x48 0x8 ERR_DIAG_RPRT_TPC
u 0x50 0x2 ERR_DIAG_RPRT_CPUID
u 0x52 0x2 ERR_DIAG_RPRT_TT
uc 0x54 0x1 ERR_DIAG_RPRT_TL
! union ERR_DIAG_RPRT_ERR_DIAG @ 0x58 has size 0xa98
#define ERR_DIAG_RPRT_IN_USE (ERR_DIAG_RPRT_ERR_DIAG + ERR_DIAG_BUF_RPRT_IN_USE)
#define ERR_DIAG_ABORT_DATA ERR_DIAG_RPRT_ERR_DIAG
#define ERR_DIAG_DATA_OFFSET (ERR_DIAG_RPRT_ERR_DIAG + ERR_DIAG_BUF_DIAG_DATA)
#define ERR_DIAG_RPRT_REPORT_SIZE (ERR_DIAG_RPRT_ERR_DIAG + ERR_DIAG_BUF_RPRT_SIZE)
! struct/union NIU_COOKIE_SIZE size 0x10
p 0x0 0x8 NIU_LDG2LDN_TABLE
p 0x8 0x8 NIU_VEC2LDG_TABLE
/* ECC_SYNDROME_TABLE_ENTRY_SIZE 0x1 */
/* ECC_MASK_TABLE_ENTRY_SIZE 0x4 */
! struct/union FPGA_UART_COOKIE_SIZE size 0x20
u 0x0 0x8 FPGA_UART_COOKIE_STATUS
u 0x8 0x8 FPGA_UART_COOKIE_ENABLE
u 0x10 0x8 FPGA_UART_COOKIE_DISABLE
uc 0x18 0x1 FPGA_UART_COOKIE_VALID
uc 0x19 0x1 FPGA_UART_COOKIE_STATE
uc 0x1a 0x1 FPGA_UART_COOKIE_TARGET
#define ENUM_HVctl_res_guest 0x0
#define ENUM_HVctl_res_vcpu 0x1
#define ENUM_HVctl_res_memory 0x2
#define ENUM_HVctl_res_mau 0x3
#define ENUM_HVctl_res_cwq 0x4
#define ENUM_HVctl_res_ldc 0x5
#define ENUM_HVctl_res_console 0x6
#define ENUM_HVctl_res_hv_ldc 0x7
#define ENUM_HVctl_res_pcie_bus 0x8
#define ENUM_HVctl_res_guestmd 0x9
#define ENUM_HVctl_res_network_device 0xa
#define ENUM_HVctl_info_guest_state 0x0
#define ENUM_HVctl_info_guest_soft_state 0x1
#define ENUM_HVctl_info_guest_tod 0x2
#define ENUM_HVctl_info_guest_utilisation 0x3
#define ENUM_HVctl_info_guest_max 0x4
p 0x0 0x8 MCONFIG_MAUS
p 0x8 0x8 MCONFIG_CWQS
p 0x10 0x8 MCONFIG_RNG
#define CONFIG_MAUS (CONFIG_MCONFIG + MCONFIG_MAUS)
#define CONFIG_CWQS (CONFIG_MCONFIG + MCONFIG_CWQS)
#define CONFIG_RNG (CONFIG_MCONFIG + MCONFIG_RNG)
p 0x0 0x8 MGUEST_NIU_STATEP
#define GUEST_NIU_STATEP (GUEST_MGUEST + MGUEST_NIU_STATEP)
! struct/union NIUMAPREG_SIZE size 0x40
u 0x0 0x4 NIUMAPREG_STATE
u 0x4 0x4 NIUMAPREG_VALID
u 0x8 0x8 NIUMAPREG_VCPUP
! struct/union NIUSTATE_SIZE size 0x1000
! array NIUSTATE_MAPREG @ 0x0 size 0x8000 : element size 0x40
! struct NIUSTATE_MAPREG @ 0x0 has size 0x1000