legion/src/devices/mem_bus/include/pcie_device.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: pcie_device.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

#ifndef _PCIE_DEVICE_H
#define _PCIE_DEVICE_H

#pragma ident   "@(#)pcie_device.h      1.4     06/10/05 SMI"

/*
 * This file contains function prototypes and data structures
 * for PCIE device generic support
 */

#ifdef __cplusplus
extern "C" {
#endif

/*
 * Structure used to implement PCIE interface unit model
 * (it's named as PIU for Niagara 2)
 */
typedef struct PCIE_MODEL pcie_model_t;

/*
 * Macros, structs used in PCIE device
 */
#define PCIE_REQ_ID(bus,dev,fun)        ((bus<<8)|((MASK64(4,0)&dev)<<3)|(MASK64(2,0)&fun))
#define PCIE_BUS_NO(req_id)             ((req_id & MASK64(15,8))>>8)
#define PCIE_DEV_NO(req_id)             ((req_id & MASK64(7,3))>>3)
#define PCIE_FUN_NO(req_id)             ((req_id & MASK64(2,0)))

typedef enum {
        PCIE_IS32 = 0,
        PCIE_IS64 = 1
} dev_mode_t;

typedef enum {
        PCIE_CFG   = 0,
        PCIE_IO    = 1,
        PCIE_MEM32 = 2,
        PCIE_MEM64 = 3
} pcie_space_t;

/*
 * PCIE interface for down bound transaction
 */
typedef struct pcie_dwbound {
        bool_t   (*mem_access)(void *hdl, uint64_t addr, uint64_t *datap, uint32_t count, dev_access_t type,
                               pcie_space_t space_id);
        int      (*bar_test)(void *hdl, uint64_t addr, pcie_space_t space_id);
} pcie_dwbound_t;

/*
 * PCIE access interface for upbound transaction
 */
typedef struct pcie_upbound {
        bool_t  (*dma_access)(pcie_model_t *pcie_model, tvaddr_t va, uint8_t *datap, int count,
                              uint16_t req_id, dev_access_t type, dev_mode_t mode);
        bool_t  (*assert_intx)(pcie_model_t *pcie_model, uint8_t pin_no, uint8_t dev_no);
        bool_t  (*deassert_intx)(pcie_model_t *pcie_model, uint8_t pin_no, uint8_t dev_no);
} pcie_upbound_t;


/*
 * PCIE device instance (an instance of a pcie device type)
 */
typedef struct pcie_dev_inst {
        uint16_t req_id;         /* 16 bit request ID (8 bit bus_no, 5 bit dev_no, 3 bit fun_no */

        pcie_dwbound_t  *pcie_dp;
        void *hdl;

        pcie_upbound_t  *pcie_up;
        pcie_model_t    *pcie_modp;

        struct pcie_dev_inst *next;
} pcie_dev_inst_t;


/*
 * PCIE device type (derived from DEV_TYPE)
 */
typedef struct pcie_dev_type {
        char            *dev_type_namep;
        void            (*dev_init)(struct pcie_dev_inst *);
        void            (*dev_parse)(void *);
        void            (*dev_dump)(void *);
} pcie_dev_type_t;


/*
 * PCIE Mondo interrupt
 */
typedef struct PCIE_MONDO {
        int thread_id;
        uint64_t data[8];
} pcie_mondo_t;


#ifdef __cplusplus
}
#endif

#endif  /* _PCIE_DEVICE_H */