legion/src/devices/mmi/sam_dev.h

/*
* ========== Copyright Header Begin ==========================================
*
* OpenSPARC T2 Processor File: sam_dev.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
*
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
*
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*
* ========== Copyright Header End ============================================
*/
/*
 * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */

#ifndef _SAM_DEV_H
#define _SAM_DEV_H

#pragma ident   "@(#)sam_dev.h  1.7     07/10/12 SMI"

#ifdef __cplusplus
extern "C" {
#endif

#include "mmi.h"
#if INTERNAL_BUILD
#include "scx.h"
#endif

/*
 * Legion MMI interface
 */
typedef struct mmi_data {
        char                    *modname;
        char                    *instance_name;
        int                     argc;
        char                    **argv;
        void                    *cb_data;
        mmi_interface_cb        interface_cb;
        mmi_config_cb           config_cb;
        mmi_instance_creator    create_instance;
        void                    *asi_cb_data;
        mmi_ld_asi_action       asi_ld_handler;
        mmi_st_asi_action       asi_st_handler;
#if INTERNAL_BUILD
        scx_handle_t            scx;
        scx_api                 *scx_ops;
#endif
} mmi_data_t;

#define         MMI_MAX_ARGC    20

#define         ROCK_SIU        "rock_siu"
#define         HH              "hh"
#define         PCIE_BUS        "pcie_bus"
#define         PARROT          "parrot"
#define         N2NIU           "n2niu"
#define         PCI1            "pci1"
#define         PCI2            "pci2"
#define         FUNC            "func"
#define         DEV             "dev"
#define         DEBUG_L2        "-d2"
#define         MAX_PARROTS     8
#define         NOADDR          999

/*
 * Legion physio interface to access MMI device registers
 */
typedef struct mmi_iomap {
        void            *obj;
        mmi_access      access;
        uint64_t        base;
        uint64_t        size;
        uint64_t        end;
        struct mmi_iomap *next;
} mmi_iomap_t;

mmi_iomap_t     *mmi_iomap_head;

typedef struct sam_cycle {
        mmi_event_cycle         handler;
        uint64_t                repeat;
        uint64_t                enable;
        void                    *cb_data;
        struct sam_cycle        *next;
} sam_cycle_t;

sam_cycle_t     *cb_cycle_head;

/*
 * Legion device to interface with the SAM MMI device
 */
typedef struct sam_device {
        mmi_data_t      *mmi_datap;
        config_dev_t    *config_devp;
        pthread_mutex_t mmi_lock;
        pthread_t       tid;
        struct sam_device *next;
} sam_device_t;

sam_device_t    *sam_dev_list_head;

typedef struct sam_intr_rec {
        uint32_t        tt;
        bool_t          enable;
        simcpu_t        *targetcpu;
} sam_intr_rec_t;

/*
 * prototypes
 */
sam_device_t    *sam_find_device(const char *dev_namep);
sam_device_t    *sam_get_instance(const char *dev_namep, uint8_t *instance);
void            sam_register_device(sam_device_t *new);
void            sam_register_iomap(mmi_iomap_t *new);
void            sam_unregister_iomap(uint64_t base, uint64_t size, void *obj);
void            sam_register_cb_cycle(sam_cycle_t *new);
void            sam_unregister_cb_cycle(void *obj);
void            *sam_start_dma(void *arg);
sam_cycle_t     *sam_find_cb_cycle(void *obj);
bool_t          sam_mem_access(uint64_t paddr, uint8_t * data, uint64_t size, dev_access_t type);
void            sam_internal_intr(int dest_cpuid, sam_device_t *sam_devp, int src_iscpu, uint32_t vnum,
                                  int traptype);
void            sam_mondo_intr(int dest_cpuid, void *src, int src_iscpu, uint64_t *idata);
int             sam_asi_ld_handler(uint32_t asi, uint64_t vaddr, uint64_t *buf, int size, uint32_t cpuid);
int             sam_asi_st_handler(uint32_t asi, uint64_t vaddr, uint64_t buf, int size, uint32_t cpuid);

LIST_DEF( sam_asi_dev_list, sam_device_t);

#ifdef FAKE_SAM
uint64_t        getreg_scal_64 (uint32_t chipId, char *name);
uint64_t        __1cOgetreg_scal_646Fpc_L_ (uint32_t chipId, char *name);
void            setreg_scal_64 (uint32_t chipId, char *name, uint64_t value);
void            __1cOsetreg_scal_646FpcL_v_ (uint32_t chipId, char *name, uint64_t value);
bool_t __1cKhandleIntp6FHHbL_b_ (uint32_t chipId, uint16_t requesterId, uint16_t intpNum, bool_t isMsi, uint64_t msiAddr);
bool_t __1cOreportPciE_Err6FHCpI_b_ (uint32_t chipId, uint16_t requesterId, uint8_t err_msg, uint32_t *header);
bool_t __1cLgetIommu_PA6FLHbpL_b_ (uint32_t chipId, uint64_t va, uint16_t requesterId, bool_t dmaWrite, uint64_t *paddr);
#endif

#ifdef __cplusplus
}
#endif

#endif /* _SAM_DEV_H */