obp/obp/cpu/sparc/ultra4v/tlbasm.fth

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\ Hypervisor Software File: tlbasm.fth
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id: @(#)tlbasm.fth 1.1 06/02/16
purpose: Implements low level tlb code for sun4v class CPUs
copyright: Copyright 2006 Sun Microsystems, Inc.  All Rights Reserved
copyright: Use is subject to license terms.


\ %o0 = VA
\ %o1 = PA
\ %o2 = Size 0 = 8K, 1 = 64K , 3 = 4M , 5 = 256M
\ %o3 = TTE Mode bits
label setup-itlb-entry
   %o1 d# 64 #pabits -  %o5  sllx
   %o5 %g0    %g0  subcc
   0<  if
   %o1  0 >tte-priv >tte-cv >tte-cp >tte-writable  %o5  or  \ P,CP,CV,W
      %o1  0 >tte-priv >tte-effect >tte-writable  %o5  or  \ P,E,W
   then
   %o5  %o3          %o1  or    \ Other bits
   %o5  %o2          %o1  or    \ Size
   %g0  1            %o2  or
   %o2  d# 63        %o2  sllx  \ V
   %o2  %o1          %o2  or    \ %o2 = TTE
   %g0               %o1  move  \ %o1 = context
   %g0  2            %o3  add   \ %o3 = ITLB
   \ %o0 = Virt
   \ %o1 = context
   \ %o2 = TTE
   \ %o3 = ITLB

   %g0 map-perm-addr-func#  %o5 add  %g0 0 always htrapif

   retl
   nop
end-code

\ %o0 = VA
\ %o1 = PA
\ %o2 = Size 0 = 8K, 1 = 64K , 3 = 4M , 5 = 256M
\ %o3 = TTE Mode bits
label setup-dtlb-entry
   %o1 d# 64 #pabits -  %o5  sllx
   %o5 %g0    %g0  subcc
   0<  if
   %o1  0 >tte-priv >tte-cv >tte-cp >tte-writable  %o5  or  \ P,CP,CV,W
      %o1  0 >tte-priv >tte-effect >tte-writable  %o5  or  \ P,E,W
   then
   %o5  %o3          %o1  or    \ Other bits
   %o5  %o2          %o1  or    \ Size
   %g0  1            %o2  or
   %o2  d# 63        %o2  sllx  \ V
   %o2  %o1          %o2  or    \ %o2 = TTE
   %g0               %o1  move  \ %o1 = context
   %g0  1            %o3  add   \ %o3 = DTLB
   \ %o0 = Virt
   \ %o1 = context
   \ %o2 = TTE
   \ %o3 = DTLB

   %g0 map-perm-addr-func#  %o5 add  %g0 0 always htrapif

   retl
   nop
end-code