* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: N2_Core.h
* Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
* The above named program is distributed in the hope that it will be
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
* ========== Copyright Header End ============================================
#include "MemoryTransaction.h"
#include "N2_MemErrDetector.h"
class N2_Core
: public SS_Node
N2_Core( N2_Cpu
& cpu
, const char* _name
, uint_t strand_id_base
);
void warm_reset(bool intp
=true);
void snapshot( SS_SnapShot
& ss
);
N2_Strand
* strand
[N2_Model::NO_STRANDS_PER_CORE
];
N2_ErrorInject error_inject
;
N2_InstMask inst_iw
[2]; // Strands 0-3 use inst_iw[0] and 4-7 use inst_iw[1]
N2_InstWp inst_wp
[2]; // Strands 0-3 use inst_wp[0] and 4-7 use inst_wp[1]
SS_Trap::Type
icache_ifetch(const MemoryTransaction
&memXact
,
N2_MemErrDetector
*mem_err_detector
);
SS_Trap::Type
dcache_trans(const MemoryTransaction
&memXact
,
N2_MemErrDetector
*mem_err_detector
);
void flush_icache(uint64_t paddr
);
void flush_dcache(uint64_t paddr
);
// Flush all the decode caches associated with this core.
void update_clesr(int sid
, int isDesr
, uint64_t value
);
std::map
<uint64_t,N2_IcacheInstrStReg
> icacheInstr
;
std::map
<uint64_t,N2_DcacheDataStReg
> dcacheData
;
std::map
<uint64_t,N2_DcacheTagLdReg
> dcacheTag
;
static SS_AsiSpace::Error
inst_iw_ld64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
inst_iw_st64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
inst_wp_ld64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
inst_wp_st64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
icache_tag_ld64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
icache_tag_st64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
icache_data_ld64( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
icache_data_st64( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
dcache_tag_ld64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
dcache_tag_st64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
dcache_data_ld64( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
dcache_data_st64( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
static SS_AsiSpace::Error
tw_status_ld64 ( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t* );
static SS_AsiSpace::Error
error_inject_st64( SS_Node
*, void*, SS_Strand
*, SS_Vaddr
, uint64_t );
uint32_t search_icache_tags(N2_IcacheAddressingFields paddr
,int32_t &hit_way
);
uint32_t search_dcache_tags(N2_DcacheAddressingFields paddr
,int32_t &hit_way
);
uint32_t calc_dcache_parity(N2_DcacheDiagDataLdAddrFields addr
);
// The N2_IcacheTagLdRegArray stores the icache diagnostics tag
// array in a vector for fast access.
class N2_IcacheTagLdRegArray
N2_IcacheTagLdRegArray() : array_(VECTOR_SIZE
) {}
virtual ~N2_IcacheTagLdRegArray() {}
N2_IcacheTagLdReg
get(N2_IcacheDiagTagAddrFields addr
)
return array_
[addr() >> N2_IcacheDiagTagAddrFields::bit_size_rsvd0
];
void set(N2_IcacheDiagTagAddrFields addr
,const N2_IcacheTagLdReg
&data
)
array_
[addr() >> N2_IcacheDiagTagAddrFields::bit_size_rsvd0
];
static const uint64_t N2_IcacheTagLdRegArray::VECTOR_SIZE
=
1 << (N2_IcacheDiagTagAddrFields::bit_size_rsvd0
+
N2_IcacheDiagTagAddrFields::bit_size_index
+
N2_IcacheDiagTagAddrFields::bit_size_way
);
std::vector
<N2_IcacheTagLdReg
> array_
;
N2_IcacheTagLdRegArray icacheTag
;