Initial commit of OpenSPARC T2 architecture model.

[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / n2 / lib / cpu / src / N2_Cpu.h

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: N2_Cpu.h
* Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
* 
* The above named program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public
* License version 2 as published by the Free Software Foundation.
* 
* The above named program is distributed in the hope that it will be 
* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
* 
* You should have received a copy of the GNU General Public
* License along with this work; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
* 
* ========== Copyright Header End ============================================
*/
#ifndef __N2_Cpu_h__
#define __N2_Cpu_h__
/************************************************************************
**  
**  Copyright (C) 2006, Sun Microsystems, Inc.
**
**  Sun considers its source code as an unpublished, proprietary
**  trade secret and it is available only under strict license provisions.
**  This copyright notice is placed here only to protect Sun in the event 
**  the source is deemed a published work. Disassembly, decompilation,
**  or other means of reducing the object code to human readable form
**  is prohibited by the license agreement under which this code is
**  provided to the user or company in possession of this copy.
**
*************************************************************************/
#include "SS_Node.h"
#include "N2_Model.h"
#include "SS_Cpu.h"
#include "N2_State.h"
#include "N2_MemErrDetector.h"

class N2_Core;
class N2_Strand;

class N2_Cpu : public SS_Cpu
{
 public:
   enum { BITS_PER_CMP_REGISTER = 64 };

   N2_Cpu( SS_Model& _model, const char* _name, uint_t strand_id_base=0 );

   void hard_reset();
   void warm_reset(bool intp=true);
   void xtrn_reset();

   void strand_running_update( uint_t strand_id, int cosim=0, uint64_t data=0 );

   N2_Core*                 core[N2_Model::NO_CORES_PER_CPU];
   N2_StrandAvailable       strand_available;
   N2_StrandEnable          strand_enable;
   N2_StrandEnableStatus    strand_enable_status;
   N2_StrandRunning         strand_running;
   N2_StrandRunningStatus   strand_running_status;
   N2_XirSteering           xir_steering;
   N2_TickEnable            tick_enable;
   N2_TwStatus              tw_status;
   N2_OverlapMode           overlap_mode;
   N2_IntrW                 intr_w;
   N2_RstVecMask            rst_vec_mask;

   N2_MemErrDetector        mem_err_detector;

 protected:  
   static SS_AsiSpace::Error set_strand_available(   SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_strand_enable(      SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_strand_running(     SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_strand_running_w1s( SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_strand_running_w1c( SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_xir_steering(       SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error set_tick_enable(        SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error intr_w_st64    (        SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t data );
   static SS_AsiSpace::Error rst_vec_st64    ( SS_Node*, void*, SS_Strand*, SS_Vaddr, uint64_t );
      
   void snapshot( SS_SnapShot& ss );
   void ras_enable(char*);

   void set_stepping( uint_t strand_id );
};

#endif