<!-- interpreter=xml2reg args='-t' -->
<register name=
"SOC_ERROR_REG (SOC_ERROR_REG)">
<class_name>N2_SocErrorReg
</class_name>
<submodule>N2
</submodule>
Parent for SOC Error Register classes.
typedef uint64_t (N2_SocErrorReg::*SocErrRegBitGetFn)(void) const;
typedef void (N2_SocErrorReg::*SocErrRegBitSetFn)(uint64_t);
static SocErrRegBitGetFn getSocErrRegMCUECC(uint_t mcuID) {
case
0: return getMCU0ECC;
case
1: return getMCU1ECC;
case
2: return getMCU2ECC;
case
3: return getMCU3ECC;
static SocErrRegBitSetFn setSocErrRegMCUECC(uint_t mcuID) {
case
0: return setMCU0ECC;
case
1: return setMCU1ECC;
case
2: return setMCU2ECC;
case
3: return setMCU3ECC;
static SocErrRegBitGetFn getSocErrRegMCUFBR(uint_t mcuID) {
case
0: return getMCU0FBR;
case
1: return getMCU1FBR;
case
2: return getMCU2FBR;
case
3: return getMCU3FBR;
static SocErrRegBitSetFn setSocErrRegMCUFBR(uint_t mcuID) {
case
0: return setMCU0FBR;
case
1: return setMCU1FBR;
case
2: return setMCU2FBR;
case
3: return setMCU3FBR;
<start_offset>43</start_offset>
<end_offset>62</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<field name=
"NCUDMUCREDIT">
<start_offset>42</start_offset>
<end_offset>42</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if an uncorrectable parity error is detectd on the credit
token bus to NCU for DMU PIO write credits.
<start_offset>41</start_offset>
<end_offset>41</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
3 detected a correctable DRAM ECC error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>40</start_offset>
<end_offset>40</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
3 detected a FBDIMM recoverable error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>39</start_offset>
<end_offset>39</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<start_offset>38</start_offset>
<end_offset>38</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
2 detected a correctable DRAM ECC error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>37</start_offset>
<end_offset>37</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
2 detected a FBDIMM recoverable error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>36</start_offset>
<end_offset>36</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<start_offset>35</start_offset>
<end_offset>35</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
1 detected a correctable DRAM ECC error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>34</start_offset>
<end_offset>34</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
1 detected a FBDIMM recoverable error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>33</start_offset>
<end_offset>33</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<start_offset>32</start_offset>
<end_offset>32</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
0 detected a correctable DRAM ECC error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>31</start_offset>
<end_offset>31</end_offset>
<initial_value>0</initial_value>
<protection>RW
</protection>
<field_type>NORMAL
</field_type>
Set to
1 if MCU
0 detected a FBDIMM recoverable error with its DRAM
Recoverable Link Error count reaching zero.
<start_offset>30</start_offset>
<end_offset>30</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>
<!-- Lots more fields left to the imagination. For details, see -->
<!-- Table 12-50. These are covered by DUMMY. -->
<start_offset>0</start_offset>
<end_offset>29</end_offset>
<initial_value>0</initial_value>
<protection>RO
</protection>
<field_type>ZERO
</field_type>