Initial commit of OpenSPARC T2 architecture model.
[OpenSPARC-T2-SAM] / sam-t2 / sam / cpus / vonk / ss / api / pli / bin / SS_CsrReadWrite.cc
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T2 Processor File: SS_CsrReadWrite.cc
// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// The above named program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 2 as published by the Free Software Foundation.
//
// The above named program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
//
// ========== Copyright Header End ============================================
/************************************************************************
**
** Copyright (C) 2006, Sun Microsystems, Inc.
**
** Sun considers its source code as an unpublished, proprietary
** trade secret and it is available only under strict license provisions.
** This copyright notice is placed here only to protect Sun in the event
** the source is deemed a published work. Disassembly, decompilation,
** or other means of reducing the object code to human readable form
** is prohibited by the license agreement under which this code is
** provided to the user or company in possession of this copy.
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*************************************************************************/
//
// @-ARCH-@_CsrReadWrite.cc is automatically generated from
// ss/api/pli/bin/Bl_CsrReadWrite.cc, do not modify @-ARCH-@_CsrReadWrite.cc
// make necessary changes in ss/api/pli/bin/Bl_CsrReadWrite.cc instead.
//
// handle csr_read/write issued by (TLR) testbench, to force csr values
// (in non-cacheable memory space) explicitly.
//
#include "@-ARCH-@_CsrReadWrite.h"
using namespace std;
//======================================================================
// CSR_WRITE: write into real register, the value will stick
//======================================================================
void @-ARCH-@_CsrReadWrite::pliWriteCsrReg(@-ARCH-@_Csr* csr, uint64_t pa, uint64_t value, bool littleEndian, int sid)
{
int access = MemoryTransaction::WRITE | MemoryTransaction::INTERNAL;
if (littleEndian)
access |= MemoryTransaction::LITTLE_ENDIAN;
csr->write64(pa, value, access, sid);
}
//======================================================================
// CSR_READ: provide a follow-me value, the value is "use-once-and-discard"
//======================================================================
void @-ARCH-@_CsrReadWrite::pliReadCsrReg(@-ARCH-@_Csr* csr, uint64_t pa, uint64_t value, bool littleEndian, int sid)
{
int access = MemoryTransaction::WRITE | MemoryTransaction::INTERNAL | MemoryTransaction::FOLLOW_ME;
if (littleEndian)
access |= MemoryTransaction::LITTLE_ENDIAN;
csr->write64(pa, value, access, sid);
}